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LC72347W Fiches technique(PDF) 7 Page - Sanyo Semicon Device

No de pièce LC72347W
Description  Ultralow-Voltage ETR Controller with On-Chip LCD Driver
Download  12 Pages
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Fabricant  SANYO [Sanyo Semicon Device]
Site Internet  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC72347W Fiches technique(HTML) 7 Page - Sanyo Semicon Device

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No. 6651-7/12
LC72346W, 72347W
Pin Functions
Pin No.
Pin
I/O
Function
I/O circuit
75 kHz oscillator connections
64
1
XIN
XOUT
I
O
IC testing.
These pins must be connected to ground.
63
2
TEST1
TEST2
I
I
Special-purpose ports for key return signal input designed with a low threshold
voltage. When a key matrix is formed in combination with port PB, simultaneous
multiple key presses with up to 3 keys can be detected. The pull-down resistors are
set up for all four pins at the same time with the IOS instruction (PWn = 2.b1). This
setting cannot be specified for individual pins. In backup mode, these pins go to the
input disabled state, and the pull-down resistors are disabled after a reset.
6
5
4
3
PA0
PA1
PA2
PA3
I
Unbalanced CMOS outputs. These outputs are switched with the IOS 0 instruction.
Since these outputs are unbalanced, no diodes are required to prevent short circuits
due to simultaneous multiple key presses. These outputs go to the high-impedance
output state in backup mode. After a reset, they go to the high-impedance output
state and remain in that state until an output instruction (OUT, SPB, or RPB) is
executed.
10
9
8
7
PB0
PB1
PB2
PB3
O
General-purpose I/O ports.
PD0, PD1 can be used as an external interrupt port. The IOS instruction (Pwn = 4, 5)
is used for switching the general-purpose I/O port function, and these ports can be set
to input or output in 1-bit units. (0: input, 1: output)
In backup mode they go to the input disabled high-impedance state.
After a reset, they switch to the general-purpose input port function.
14
13
12
11
18
17
16
15
PC0
PC1
PC2
PC3
INT1/PD0
INT0/PD1
PD2
PD3
*2
I/O
O
General-purpose output and beep tone output shared function ports (PE0 only). The
BEEP instruction is used to switch PE0 between the general-purpose output port and
beep tone output functions. To use PE0 as a general-purpose output port, execute a
BEEP instruction with b2 set to 0. Set b2 to 1 to use PE0 as the beep tone output
port. The b0 and b1 bits are used to select the beep tone frequency. There are two
beep tone frequencies supported.
*: When PE0 is set up as the beep tone output, executing an output instruction to PE0
only changes the state of the internal output latch, it does not affect the beep tone
output in any way. Only the PE0 pin can be switched between the general-purpose
output function and the beep tone output function; the PE1 pin only functions as a
general-purpose output. These pins go to the high-impedance state in backup
mode and remain in that state until an output instruction or a BEEP instruction is
executed. Since these ports are open-drain ports, resistors must be inserted
between these pins and VDD. These ports are set to general-purpose output port
function after a reset.
20
19
BEEP/PE0
PE1
I/O
Shared function pins used as either general-purpose I/O ports or a serial I/O port.
When used as general-purpose I/O ports, the I/O direction can be switched in single
pin units with the IOS instruction (with Pwn = C). The IOS instruction (with Pwn = 1,
b2) is used to switch the function between the general-purpose I/O port and the serial
I/O port function. (0: general-purpose I/O port, 1: serial I/O)
In backup mode (low power mode) these pins go to the input disabled high-
impedance state. After a reset, the general-purpose input port function is selected.
27
26
25
24
PK0
SCK1/PK1
SO1/PK2
SI1/PK3
Input with built-in
pull-down resistor
N-channel open-drain
CMOS push-pull
CMOS push-pull
Continued on next page.
Unbalanced CMOS push-pull


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