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LC651432N Fiches technique(PDF) 7 Page - Sanyo Semicon Device |
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LC651432N Fiches technique(HTML) 7 Page - Sanyo Semicon Device |
7 / 39 page Development Support The following are available to support the development of LC651431 and LC651432 applications. • User’s manual “LC6543/46 User’s Manual” No. E71 • Development tool manual See the “EVA86000 Development Tool Manual for 4-Bit Microcontrollers.” • Software manual “LC65/66 Series Software Manual” • Development tools Program development: EVA86000 System Program evaluation: LC65E43 on-chip EPROM microcontroller No. 6498-7/39 LC651432N/F/L, 651431N/F/L Pins Functions Count Pin I/O Function Options Reset state Handling when unused 1VDD — Power supply — — — 1VSS — 1 OSC1 Input • Connection for the external system clock 1. Single-pin external clock input — — RC or ceramic oscillator element 2. 2-pin RC oscillator • When a single pin is used for external clock 3. 2-pin ceramic oscillator input, the PI0/OSC2 pin is used as the PI0 4. Divider circuit option I/O port. • No divider • When a 2-pin RC oscillator or a 2-pin ceramic • Divide-by-three circuit oscillator is used, the PI0/OSC2 pin is used as • Divide-by-four circuit the OSC2 oscillator pin. 4 PA0 to PA3 I/O • I/O port A0 to 3 1. Open-drain output • High-level The open-drain Input in 4-bit units (IP instruction) 2. Built-in pull-up resistor output (with output option Output in 4-bit units (OP instruction) Options 1 and 2 may be specified the output n- must be Test in single-bit units (BP and BNP instructions) in bit units. channel selected and Set/reset in single-bit units (SPB and RPB transistor off) the pin instructions) connected to • PA3 (Any one of PA0 to 3 can be selected) is VSS. used for standby mode control. • Applications must assure that key bounce or similar noise does not occur on PA3 (or PA0 to 3) during a HALT instruction execution cycle. 4 PC0 to PC3 I/O • I/O port C0 to 3 1. Open-drain output • High-level The same as Provides the same functions as PA0 to 3. 2. Built-in pull-up resistor output that for PC0 to 3 (See note.) 3. High-level output at reset • Low-level • The output level at reset can be specified to be 4. Low-level output at reset output either high or low. • Options 1 and 2 may be specified (Specified as a Note: This port does not have the standby in bit units. user option.) mode control function. • Options 3 and 4 are specified in a single 4-bit group 4 PD0 to PD3 I/O • I/O port D0 to 3 The same as those for PC0 to 3. The same as The same as Provides the same functions as PC0 to 3. those for PC0 to 3. those for PC0 to 3. Continued on next page. |
Numéro de pièce similaire - LC651432N |
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Description similaire - LC651432N |
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