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74LVC2T45GS Fiches technique(PDF) 3 Page - NXP Semiconductors |
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74LVC2T45GS Fiches technique(HTML) 3 Page - NXP Semiconductors |
3 / 36 page 74LVC_LVCH2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 — 20 August 2010 3 of 36 NXP Semiconductors 74LVC2T45; 74LVCH2T45 Dual supply translating transceiver; 3-state [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 6. Pinning information 6.1 Pinning 74LVC2T45GN V5 74LVCH2T45GN X5 74LVC2T45GS V5 74LVCH2T45GS X5 Table 2. Marking …continued Type number Marking code[1] Fig 1. Logic symbol Fig 2. Logic diagram 001aag577 DIR 1B 2B 7 6 1A 2A 5 2 3 VCC(A) VCC(B) 001aag578 DIR 1B 2B 1A 2A VCC(A) VCC(B) Fig 3. Pin configuration SOT765-1 Fig 4. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 74LVC2T45 74LVCH2T45 VCC(A) VCC(B) 1A 1B 2A 2B GND DIR 001aai904 1 2 3 4 6 5 8 7 74LVC2T45 74LVCH2T45 2B 1B VCC(B) DIR 2A 1A VCC(A) GND 001aai905 36 27 18 45 Transparent top view |
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