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ISL31496E Fiches technique(PDF) 10 Page - Intersil Corporation |
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ISL31496E Fiches technique(HTML) 10 Page - Intersil Corporation |
10 / 27 page ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E, 10 FN7637.0 June 17, 2010 Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 14, 20) Full - - 50 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 14, 20) Full - - 50 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) (Note 20) Full - - 50 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) (Note 20) Full - - 50 ns Time to Shutdown tSHDN (Notes 15) Full 60 160 600 ns Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 15, 17) Full - - 2000 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 15, 17) Full - - 2000 ns RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL31493E, ISL31495E) Maximum Data Rate fMAX -25V ≤ VCM ≤ 25V (Figure 5) Full 1 15 - Mbps Receiver Input to Output Delay tPLH, tPHL -25V ≤ VCM ≤ 25V (Figure 5) Full - 90 150 ns Receiver Skew |tPLH - tPHL| tSKD (Figure 5) Full - 4 10 ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Note 14) Full - - 50 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Note 14) Full - - 50 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) Full - - 50 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full - - 50 ns Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 15, 17) Full - - 2000 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 15, 17) Full - - 2000 ns RECEIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL31496E, ISL31498E) Maximum Data Rate fMAX -25V ≤ VCM ≤ 25V (Figure 5) Full 15 25 - Mbps Receiver Input to Output Delay tPLH, tPHL -25V ≤ VCM ≤ 25V (Figure 5) Full - 35 70 ns Receiver Skew |tPLH - tPHL| tSKD (Figure 5) Full - 4 10 ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Note 14) Full - - 50 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Note 14) Full - - 50 ns Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 10). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 18) TYP MAX (Note 18) UNITS |
Numéro de pièce similaire - ISL31496E |
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Description similaire - ISL31496E |
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