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S3C4510B Fiches technique(PDF) 99 Page - Samsung semiconductor |
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S3C4510B Fiches technique(HTML) 99 Page - Samsung semiconductor |
99 / 422 page S3C4510B INSTRUCTION SET 3-57 TRANSFERS TO R15 When a coprocessor register transfer to ARM7TDMI has R15 as the destination, bits 31, 30, 29 and 28 of the transferred word are copied into the N, Z, C and V flags respectively. The other bits of the transferred word are ignored, and the PC and other CPSR bits are unaffected by the transfer. TRANSFERS FROM R15 A coprocessor register transfer from ARM7TDMI with R15 as the source register will store the PC+ 12. INSTRUCTION CYCLE TIMES MRC instructions take 1S + (b+1)I +1C incremental cycles to execute, where S, I and C are defined as sequential (S-cycle), internal (I-cycle), and coprocessor register transfer (C-cycle), respectively. MCR instructions take 1S + bI +1C incremental cycles to execute, where b is the number of cycles spent in the coprocessor busy-wait loop. ASSEMBLER SYNTAX <MCR|MRC>{cond} p#,<expression1>,Rd,cn,cm{,<expression2>} MRC Move from coprocessor to ARM7TDMI register (L = 1) MCR Move from ARM7TDMI register to coprocessor (L = 0) {cond} Two character condition mnemonic. See Table 3-2. p# The unique number of the required coprocessor <expression1> Evaluated to a constant and placed in the CP Opc field Rd An expression evaluating to a valid ARM7TDMI register number cn and cm Expressions evaluating to the valid coprocessor register numbers CRn and CRm respectively <expression2> Where present is evaluated to a constant and placed in the CP field Examples MRC p2,5,R3,c5,c6 ; Request coproc 2 to perform operation 5 ; on c5 and c6, and transfer the (single ; 32-bit word) result back to R3. MCR p6,0,R4,c5,c6 ; Request coproc 6 to perform operation 0 ; on R4 and place the result in c6. MRCEQ p3,9,R3,c5,c6,2 ; Conditionally request coproc 3 to ; perform operation 9 (type 2) on c5 and ; c6, and transfer the result back to R3. |
Numéro de pièce similaire - S3C4510B |
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Description similaire - S3C4510B |
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