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LM3S9B92-IQR50-C1T Fiches technique(PDF) 7 Page - Texas Instruments

No de pièce LM3S9B92-IQR50-C1T
Description  Stellaris LM3S9B92 Microcontroller
Download  1279 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
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LM3S9B92-IQR50-C1T Fiches technique(HTML) 7 Page - Texas Instruments

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15.6
Register Descriptions .................................................................................................. 660
16
Inter-Integrated Circuit (I2C) Interface ................................................................ 688
16.1
Block Diagram ............................................................................................................ 689
16.2
Signal Description ....................................................................................................... 689
16.3
Functional Description ................................................................................................. 690
16.3.1 I2C Bus Functional Overview ........................................................................................ 690
16.3.2 Available Speed Modes ............................................................................................... 692
16.3.3 Interrupts .................................................................................................................... 693
16.3.4 Loopback Operation .................................................................................................... 694
16.3.5 Command Sequence Flow Charts ................................................................................ 694
16.4
Initialization and Configuration ..................................................................................... 701
16.5
Register Map .............................................................................................................. 702
16.6
Register Descriptions (I2C Master) ............................................................................... 703
16.7
Register Descriptions (I2C Slave) ................................................................................. 716
17
Inter-Integrated Circuit Sound (I2S) Interface .................................................... 725
17.1
Block Diagram ............................................................................................................ 726
17.2
Signal Description ....................................................................................................... 726
17.3
Functional Description ................................................................................................. 727
17.3.1 Transmit ..................................................................................................................... 729
17.3.2 Receive ...................................................................................................................... 733
17.4
Initialization and Configuration ..................................................................................... 735
17.5
Register Map .............................................................................................................. 736
17.6
Register Descriptions .................................................................................................. 737
18
Controller Area Network (CAN) Module ............................................................. 762
18.1
Block Diagram ............................................................................................................ 763
18.2
Signal Description ....................................................................................................... 763
18.3
Functional Description ................................................................................................. 764
18.3.1 Initialization ................................................................................................................. 765
18.3.2 Operation ................................................................................................................... 766
18.3.3 Transmitting Message Objects ..................................................................................... 767
18.3.4 Configuring a Transmit Message Object ........................................................................ 767
18.3.5 Updating a Transmit Message Object ........................................................................... 768
18.3.6 Accepting Received Message Objects .......................................................................... 769
18.3.7 Receiving a Data Frame .............................................................................................. 769
18.3.8 Receiving a Remote Frame .......................................................................................... 769
18.3.9 Receive/Transmit Priority ............................................................................................. 770
18.3.10 Configuring a Receive Message Object ........................................................................ 770
18.3.11 Handling of Received Message Objects ........................................................................ 771
18.3.12 Handling of Interrupts .................................................................................................. 773
18.3.13 Test Mode ................................................................................................................... 774
18.3.14 Bit Timing Configuration Error Considerations ............................................................... 776
18.3.15 Bit Time and Bit Rate ................................................................................................... 776
18.3.16 Calculating the Bit Timing Parameters .......................................................................... 778
18.4
Register Map .............................................................................................................. 781
18.5
CAN Register Descriptions .......................................................................................... 782
19
Ethernet Controller .............................................................................................. 814
19.1
Block Diagram ............................................................................................................ 815
7
June 14, 2010
Texas Instruments-Advance Information
Stellaris® LM3S9B92 Microcontroller


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