Moteur de recherche de fiches techniques de composants électroniques |
|
SN74AUP1G98DBVTG4 Fiches technique(PDF) 3 Page - Texas Instruments |
|
SN74AUP1G98DBVTG4 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 26 page 3 1 6 C B A 4 Y 1 2 3 6 5 4 B Y C VCC B A C Y A GND 1 2 3 6 5 4 A Y C VCC C Y A GND SN74AUP1G98 www.ti.com SCES506H – NOVEMBER 2003 – REVISED MAY 2010 LOGIC DIAGRAM (POSITIVE LOGIC) Table 1. FUNCTION SELECTION TABLE LOGIC FUNCTION FIGURE NO. 2-to-1 data selector with inverted output Figure 3 2-input NAND gate Figure 4 2-input NOR gate with one inverted input Figure 5 2-input AND gate with one inverted input Figure 5 2-input NAND gate with one inverted input Figure 6 2-input OR gate with one inverted input Figure 6 2-input NOR gate Figure 7 Noninverted buffer Figure 8 Inverter Figure 9 LOGIC CONFIGURATIONS Figure 3. 2-to-1 Data Selector With Inverted Output When C is L, Y = B When C is H, Y = A Figure 4. 2-Input NAND Gate Copyright © 2003–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): SN74AUP1G98 |
Numéro de pièce similaire - SN74AUP1G98DBVTG4 |
|
Description similaire - SN74AUP1G98DBVTG4 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |