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AM26LV32EIRGYR Fiches technique(PDF) 2 Page - Texas Instruments |
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AM26LV32EIRGYR Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 18 page 4Y 3Y 2Y 1Y 13 11 5 3 4B 4A 3B 3A 2B 2A 1B 1A G G 15 14 9 10 7 6 1 2 12 4 AM26LV32E SLLS849A – APRIL 2008 – REVISED MAY 2008............................................................................................................................................................... www.ti.com ORDERING INFORMATION TA PACKAGE(1)(2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC – D Tape and reel AM26LV32EIDR AM26LV32EI SOP – NS Tape and reel AM26LV32EINSR 26LV32EI –40 °C to 85°C TSSOP – PW Tape and reel AM26LV32EIPWR SB32 QFN – RGY Tape and reel AM26LV32EIRGYR SB32 (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLE(1) (each receiver) ENABLES DIFFERENTIAL OUTPUT INPUT G G H X H VID ≥ 0.2 V X L H H X ? –0.2 V < VID < 0.2 V X L ? H X L VID ≤ –0.2 V X L L H X H Open, shorted, or terminated X L H X L H Z (1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate LOGIC DIAGRAM (POSITIVE LOGIC) 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): AM26LV32E |
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