Moteur de recherche de fiches techniques de composants électroniques 

ADP3212A Fiches technique(PDF) 28 Page  ON Semiconductor 

ADP3212A Fiches technique(HTML) 28 Page  ON Semiconductor 
28 / 35 page ADP3212A, NCP3218A http://onsemi.com 28 The most effective way to reduce switching loss is to use lower gate capacitance devices. The conduction loss of the main MOSFET is given by the following equation: PC(MF) + D IO nMF 2 ) 1 12 n IR nMF 2 RDS(MF) (eq. 16) where RDS(MF) is the on resistance of the MOSFET. Typically, a user wants the highest speed (low CISS) device for a main MOSFET, but such a device usually has higher on resistance. Therefore, the user must select a device that meets the total power dissipation (about 0.8 W to 1.0 W for an 8−lead SOIC) when combining the switching and conduction losses. For example, an IRF7821 device can be selected as the main MOSFET (four in total; that is, nMF = 4), with approximately CISS = 1010 pF (maximum) and RDS(MF) = 18 mW (maximum at TJ = 120°C), and an IR7832 device can be selected as the synchronous MOSFET (four in total; that is, nSF = 4), with RDS(SF) = 6.7 mW (maximum at TJ = 120°C). Solving for the power dissipation per MOSFET at IO = 40 A and IR = 9.0 A yields 630 mW for each synchronous MOSFET and 590 mW for each main MOSFET. A third synchronous MOSFET is an option to further increase the conversion efficiency and reduce thermal stress. Finally, consider the power dissipation in the driver for each phase. This is best described in terms of the QG for the MOSFETs and is given by the following equation: PDRV + fSW 2 n (nMF QGMF ) nSF QGSF) ) ICC VCC (eq. 17) where QGMF is the total gate charge for each main MOSFET, and QGSF is the total gate charge for each synchronous MOSFET. The previous equation also shows the standby dissipation (ICC times the VCC) of the driver. Ramp Resistor Selection The ramp resistor (RR) is used to set the size of the internal PWM ramp. The value of this resistor is chosen to provide the best combination of thermal balance, stability, and transient response. Use the following expression to determine a starting value: RR + AR L 3 AD RDS CR (eq. 18) RR + 0.5 360 nH 3 5 5.2 mW 5pF + 462 kW where: AR is the internal ramp amplifier gain. AD is the current balancing amplifier gain. RDS is the total low−side MOSFET on resistance. CR is the internal ramp capacitor value. Another consideration in the selection of RR is the size of the internal ramp voltage (see Equation 19). For stability and noise immunity, keep the ramp size larger than 0.5 V. Taking this into consideration, the value of RR in this example is selected as 280 k W. The internal ramp voltage magnitude can be calculated as follows: VR + AR (1 * D) VVID RR CR fSW (eq. 19) VR + 0.5 (1 * 0.061) 1.150 V 462 kW 5pF 280 kHz + 0.83 V The size of the internal ramp can be increased or decreased. If it is increased, stability and transient response improves but thermal balance degrades. Conversely, if the ramp size is decreased, thermal balance improves but stability and transient response degrade. In the denominator of Equation 18, the factor of 3 sets the minimum ramp size that produces an optimal combination of good stability, transient response, and thermal balance. Current Limit Setpoint To select the current limit setpoint, the resistor value for RCLIM must be determined. The current limit threshold for the APD3212A/NCP3218A is set with RCLIM. RCLIM can be found using the following equation: RLIM + ILIM RO 60 mA (eq. 20) where: RLIM is the current limit resistor. RO is the output load line. ILIM is the current limit setpoint. When the APD3212A/NCP3218A is configured for 3 phase operation, the equation above is used to set the current limit. When the APD3212A/NCP3218A switches from 3 phase to 1 phase operation by PSI or DPRSLP signal, the current is single phase is one third of the current limit in 3 phase. When the APD3212A/NCP3218A is configured for 2 phase operation, the equation above is used to set the current limit. When the APD3212A/NCP3218A switches from 2 phase to 1 phase operation by PSI or DPRSLP signal, the current is single phase is one half of the current limit in 2 phase. When the APD3212A/NCP3218A is configured for 1 phase operation, the equation above is used to set the current limit. Current Monitor The APD3212A/NCP3218A has output current monitor. The IMON pin sources a current proportional to the total inductor current. A resistor, RMON, from IMON to FBRTN sets the gain of the output current monitor. A 0.1 mF is placed in parallel with RMON to filter the inductor current ripple and 
