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SMP402 Fiches technique(PDF) 6 Page - Power Integrations, Inc. |
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SMP402 Fiches technique(HTML) 6 Page - Power Integrations, Inc. |
6 / 16 page SMP402 D 1/96 6 Figure 6. Schematic Diagram of a Non-isolated 5 V, 1 W ISDN Regulator Circuit Utilizing the SMP402. The 5 V output voltage is directly sensed and accurately regulated by an internal error amplifier. The error amplifier generates an error signal which directly controls the duty cycle of the integrated high-voltage P-channel MOSFET switch. The effective output voltage can be fine-tuned by adjusting the resistor divider formed by R5 and R6. Other output voltages are possible (up to approximately half the input voltage) by changing the value of L1 as well as the resistor divider. Polarity of the DC input voltage can be either positive or negative. D1, D2, D3, and D4 “rectify” the DC input voltage to provide a positive polarity input voltage for the converter. C1 provides input voltage filtering. The SMP402 contains the integrated controller and high-voltage P-channel MOSFET which, together with D6, generates a pulse width modulated switching AC voltage waveform. L1 and C2 filter the AC voltage to create the 5 V output. C6 filters high-frequency noise currents. R5 and R6 sense and divide the 5 V output voltage for comparison with the internal The Buck DC-to-DC converter shown in Figure 6 produces a single non-isolated 5 V, 1 W power supply. The high- voltage P-channel MOSFET transistor in the SMP402 is turned on and off at the switching frequency. The ratio of ON- time to the switching period is defined as the duty cycle. The duty cycle changes with input voltage to maintain a constant average value of the switching waveform. The switching waveform is filtered by inductor L1 and capacitor C2 to produce the 5 V output. During the MOSFET ON-time, the switch current and inductor current ramp up at a linear rate. During the P channel MOSFET switch off time, the voltage across L1 reverses, forward biasing D6. Inductor and diode current then ramp down linearly until the MOSFET turns on again. During normal operation, inductor current ramps up and down around the average value (I OUT), which is actually the DC load current. bandgap reference voltage. C4 and R4 provide control loop compensation feedback around the internal error amplifier. C3 bypasses the onboard V S regulator. C11 sets the switching frequency. R3 is fixed to set internal currents accurately. C5 bypasses an internally-generated, level-shifted bias source of approximately 10 V, which is referenced to the positive side of the effective input voltage. This floating supply is used for biasing the P-channel MOSFET gate drivers. R1 and R2 sense the level and polarity of the DC input voltage. The current through R1 and the SENSE+ input or R2 and the SENSE- input must exceed 23 µA before the converter will turn on. R7 and R8 provide hysteresis for the SENSE+ and SENSE- inputs. Jumper JMP1 disables the self-bias feature of the SMP402. General Circuit Operation PI-1455-042695 R1 1.2 M Ω C3 100 nF C5 100 nF R3 20.5 k Ω INPUT VOUT + - C11 120 pF L1 470 µH C6 100 nF C2 82 µF R5 75 k Ω C4-1 nF R4 240 k Ω R6 24.9 k Ω U1 D6 UF4002 D1 R2 1.2 M Ω R8 3.3 M Ω D2 D3 D4 4X 1N4002 JMP 1 LEVEL POLARITY RTN R7 3.3 M Ω 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 C1 |
Numéro de pièce similaire - SMP402 |
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Description similaire - SMP402 |
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