74LVC3GU04_09 datasheet(8/17 Pages) NXP

No de pièce	74LVC3GU04

Description	Triple inverter

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Fabricant	NXP [NXP Semiconductors]

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74LVC3GU04_7

Product data sheet

Rev. 07 — 11 November 2009

8 of 17

NXP Semiconductors

74LVC3GU04

Triple inverter

Test data is given in Table 10.

Deﬁnitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 9.

Load circuitry for measuring switching times

VEXT

VCC

VI

VO

mna616

DUT

CL

RT

RL

G

Table 10.

Test data

Supply voltage

Input

Load

VEXT

VCC

VI

tr =tf

CL

RL

tPLH, tPHL

1.65 V to 1.95 V

VCC

≤ 2.0 ns

30 pF

1 k

Ω

open

2.3 V to 2.7 V

VCC

≤ 2.0 ns

30 pF

500

Ω

open

2.7 V

≤ 2.5 ns

50 pF

500

Ω

open

3.0 V to 3.6 V

2.7 V

≤ 2.5 ns

50 pF

500

Ω

open

4.5 V to 5.5 V

VCC

≤ 2.5 ns

50 pF

500

Ω

open

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