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BD4220AMUV Fiches technique(PDF) 3 Page - Rohm

No de pièce BD4220AMUV
Description  Silicon monolithic integrated circuit
Download  5 Pages
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Fabricant  ROHM [Rohm]
Site Internet  http://www.rohm.com
Logo ROHM - Rohm

BD4220AMUV Fiches technique(HTML) 3 Page - Rohm

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REV. A
○ Blosk Diagrum
○ UVLO、TSD、SDP
Fig.3 Block diagram
Fig.4 Timing Chart: Under Protective Circuit Operation
◆UVLO
If the VCC voltage is reduced to the UVLO detection voltage specified in the electrical characteristics or less, the UVLO
protective circuit is activated and the charging operation temporarily stops. (See Time ○
C
and ○
E
in Fig.4.) After that, when the
VDD voltage becomes the UVLO release voltage or more, the charging operation automatically restarts. (See Time ○
D
and ○
F
in Fig.4.)
◆VDD UVLO
If the VDD voltage becomes the VDD UVLO detection voltage or less, the IGBT_OUT voltage is forced to be set to "L".
◆Termal Shut Down (TSD)
It protects the IC against thermal runaway due to excessive temperature rise (Tj>175°C [TYP]). After detection, the charging
operation temporarily stops (See time ○
G
in Fig.4.), and when the chip temperature decreases, (Tj<150°C [TYP]), it
automatically restarts. (See Time ○
H
in Fig.4.)
◆VC pin short detection (SDP)
If the VC pin becomes the GND level due to any failure and the PowerMOS repeats switching 216(=65536) times which is the SDP
count number (TSDP) at the maximum OFF time, it is judged as an error and the charging operation is forced to be stopped. (See
Time ○
B
in Fig.4.) If the START pin is changed from "L" to "H" and the UVLO detection is released, it restarts.
STB
S
R
Q
LOGIC
STB
UVLO
TSD
S
R
OS
VCC
FULL
UVLO
Q
VCC
TSD
PGND
STB
S
R
FULL
OS
Q
VC
VCC
START
ADJ
FULL
IGBT_IN
GND
VREF
UVLO
TSD
START
OFF time detection
MAX OFF TIME
DRV
+
-
1/A
+
-
GND
VDD
IGBT_EN
SDP
SDP
SDP
VC
Anti-
Ringing
Filter
UVLO_VDD
MAXON
MAX_ON
SW
SW
IGBT_OUT_P
VC
PGND
PGND
IGBT_OUT_N
MAX_ON
*STB : Standby signal
*OS
: One shot pulse
SW
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
Operation stop due to increase of
chip temperature
A
B C
D
E
F
G
H
I
t
t
t
t
t
I(VBAT)
V(cap)
V(VC)
V(START)
Voltage at completion
of charge
UVLO detection
voltage
Operation restart due to decrease
of chip temperature
TSDP
Hysterisis
Operation stop due to UVLO detection
Operation restart due to UVLO release


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