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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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AM1707BZKB3 Fiches technique(PDF) 18 Page - Texas Instruments |
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AM1707BZKB3 Fiches technique(HTML) 18 Page - Texas Instruments |
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18 / 198 page  AM1707 SPRS637 – FEBRUARY 2010 www.ti.com Table 3-6. External Memory Interface A (EMIFA) Terminal Functions (continued) PIN No. SIGNAL NAME TYPE(1) PULL(2) MUXED DESCRIPTION ZKB EMA_A[12]/LCD_MCLK/GP1[12] N11 O IPU EMA_A[11]/ LCD_AC_ENB_CS/GP1[11] P11 O IPU EMA_A[10]/LCD_VSYNC/GP1[10] N8 O IPU EMA_A[9]/LCD_HSYNC/GP1[9] R11 O IPU EMA_A[8]/LCD_PCLK/GP1[8] T11 O IPU LCD, GPIO EMIFA address bus EMA_A[7]/LCD_D[0]/GP1[7] N10 O IPD EMA_A[6]/LCD_D[1]/GP1[6] P10 O IPD EMA_A[5]/LCD_D[2]/GP1[5] R10 O IPD EMA_A[4]/LCD_D[3]/GP1[4] T10 O IPD EMA_A[3]/LCD_D[6]/GP1[3] N9 O IPD EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2] P9 O IPU MMCSD, UHPI, GPIO EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1] R9 O IPU EMIFA address bus. EMA_A[0]/LCD_D[7]/GP1[0] T9 O IPD LCD, GPIO LCD, UHPI, EMA_BA[1]/LCD_D[5]/UHPI_HHWIL/GP1[13] P8 O IPU GPIO EMIFA bank address EMA_BA[0]/LCD_D[4]/GP1[14] R8 O IPU LCD, GPIO McASP2, GPIO, EMA_CLK/OBSCLK/AHCLKR2/GP1[15] R12 O IPU EMIFA clock. OBSCLK EMIFA SDRAM clock EMA_SDCKE/GP2[0] T12 O IPU GPIO enable. EMIFA SDRAM row EMA_RAS /EMA_CS[5]/GP2[2] N7 O IPU address strobe. EMIF A chip select, GPIO EMIFA SDRAM column EMA_CAS /EMA_CS[4]/GP2[1] L16 O IPU address strobe. EMA_RAS/ EMA_CS[5] /GP2[2] N7 O IPU EMIF A SDRAM, GPIO EMA_CAS/ EMA_CS[4] /GP2[1] L16 O IPU EMIFA Async Chip EMA_CS[3] /AMUTE2/GP2[6] T7 O IPU McASP2, GPIO Select UHPI, GPIO, EMA_CS[2] /UHPI_HCS/GP2[5]/BOOT[15] P7 O IPU BOOT EMIFA SDRAM chip EMA_CS[0] /UHPI_HAS/GP2[4] T8 O IPU UHPI, GPIO select UHPI, MCASP0, EMIFA SDRAM write EMA_WE /UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14] M13 O IPU GPIO, BOOT enable. EMIFA write EMA_WE_DQM[1] /UHPI_HDS2/AXR0[14]/GP2[8] P12 O IPU enable/data mask for EMA_D[15:8] UHPI, McASP, GPIO EMIFA write EMA_WE_DQM[0] /UHPI_HINT/AXR0[15]/GP2[9] M14 O IPU enable/data mask for EMA_D[7:0]. UHPI, McASP0, EMA_OE /UHPI_HDS1/AXR0[13]/GP2[7] R7 O IPU EMIFA output enable. GPIO EMIFA wait EMA_WAIT[0]/ UHPI_HRDY/GP2[10] N6 I IPU UHPI, GPIO input/interrupt. 18 Device Overview Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1707 |
Numéro de pièce similaire - AM1707BZKB3 |
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Description similaire - AM1707BZKB3 |
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