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US1206 Fiches technique(PDF) 3 Page - UNISEM

No de pièce US1206
Description  1A ULTRA LOW DROPOUT POSITIVE ADJUSTABLE & FIXED REGULATOR
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US1206 Fiches technique(HTML) 3 Page - UNISEM

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US1206/1207/1208/1209
2-3
Rev. 1.1
6/26/00
Pin DescRIPTIONS
Pin DescRIPTIONS
PIN DESCRIPTION
A resistor divider from this pin to the Vout pin and ground sets
the output voltage.
An open collector output that switches low when the output
voltage drops about 4% below its expected regulated voltage.
The output of the regulator .A minimum of 2.2uF capacitor
must be connected from this pin to ground.
Ground pin. This pin must be connected to the lowest poten-
tial in the system & all other pins must be at higher potential
with respect to this pin.
Enable pin. A low signal or left open on this pin shuts down the
output.This pin must be tied HI or to Vin for normal operation.
The input pin of the regulator. Typically a large storage
capacitor is connected from this pin to ground to insure that
the input voltage does not sag below the minimumdrop out
voltage during the load transient response. This pin must al-
ways be 0.6V higher than Vout in order for thedevice to regu-
late properly.
APPLICATION INFORMATION
APPLICATION INFORMATION
Stability
The US120X series of regulators require the use of an
output capacitor as part of the frequency compensation
in order to make the regulator stable. A minimum of
2.2uF capacitance and the ESR in the range of 0.5 to 2
ohm insures the stability of the system.
Part Number
Output
Voltage
US1206-18
1.8V
US1206-25
2.5V
US1206-33
3.3V
US1207-18
1.8V
US1207-25
2.5V
US1207-33
3.3V
US1208
1.24V
US1209
1.24V
Table 1- Output voltage v.s. part number
Note 1 : Low duty cycle pulse testing with Kelvin con-
nections are required in order to maintain accurate data.
Note 2 : Drop-out voltage is defined as the minimum
differential voltage between Vin and Vout required to main-
tain regulation at Vout. It is measured when the output
voltage drops 1% below its nominal value.
US1207,1208
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Ground Current-S.D Activated
Iqsd
Enable=0V
0.01
1
uA
Enable pin input LO voltage
Venl
Regulator OFF (Note 4)
0.8
V
Enable pin input HI voltage
Venh
Regulator ON (Note 4)
2
V
Enable pin input LO current
Venl=0V to 0.8V (Note 4)
0.1
2
uA
Enable pin input HI current
Venh=2V to Vin (Note 4)
100
600
uA
US1207,1209
Flag Output Threshold Voltage Vthfg
3.8
%Vo
Flag Output Hysterises Voltage Vhys
Output Ramping Up
0.8
%Vo
Flag Output Saturation Voltage Vfsat
Io=5mA
400
mV
Io=500uA
230
mV
Note 3 : Ground current is the the regulator quiescent
current plus the pass transistor current. The total cur-
rent from the supply is the sum of the load current plus
the ground pin current.
Note 4 : The specification applies for the junction tem-
perature of 0 to +125
°C.
PIN SYMBOL
Adj
US1208,1209
Flag
US1208
Vout
All devices
GND
All devices
Enable
US1207,1209
Vin
All devices


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