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SL38000ZC-XXXT Fiches technique(PDF) 8 Page - SpectraLinear Inc |
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SL38000ZC-XXXT Fiches technique(HTML) 8 Page - SpectraLinear Inc |
8 / 12 page Rev 1.1, August 7, 2008 Page 8 of 12 SL38000 Programmable Output Clock (CLKOUT) Rise and Fall Times The output clock rise and fall times (tr/tf) of each clock output can be programmed independently to match drive level to load impedance. Programming Code VDDO=3.3V CL=15pF VDDO=2.5V CL=15pF VDDO=1.8V CL=15pF Unit 000 4.00 4.80 5.60 ns 001 2.00 2.60 3.20 ns 010 1.40 1.80 2.20 ns 011 1.10 1.40 1.70 ns 100 0.85 1.10 1.40 ns 101 0.70 0.90 1.10 ns 110 0.55 0.70 0.90 ns Table 1. Programmable CLKOUT Rise and Fall Times Notes: 1. All typical values are at respective nominal VDD values. 2. The worst case rise and fall times variations are +/- 20% for C-Grade and +/-30% for I-grade. I2C-Bus Timing Specifications STANDARD-MODE FAST-MODE PARAMETER SYMBOL MIN. MAX. MIN. MAX. UNIT SCL Clock Frequency fSCL 0 100 0 400 kHz START hold time tHD;STA 4.0 - 0.6 - μs SCLK LOW period tLOW 4.7 - 1.3 - μs SCLK HIGH period tHIGH 4.0 - 0.6 - μs START Set- up time tSU;DAT 4.7 - 0.6 - μs SDA set-up time tSU;DAT 250 - 100 - ns SDA/SCLK rise time tR - 1000 - 300 ns |
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