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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TPS658621A Fiches technique(PDF) 7 Page - Texas Instruments |
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TPS658621A Fiches technique(HTML) 7 Page - Texas Instruments |
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7 / 105 page  TPS658621A www.ti.com SLVSA58 – DECEMBER 2009 2.5 ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RTC_OUT LDO VO(RTC_OUT)TYP=1.25, 1.50, 1.8, 2.5, V Output Voltage, Selectable via I 2C(1) 2.7,2.85,3.1,3.3 Dropout voltage, I(RTC_OUT) = –15 mA 600 mV V(SYS) = 2.8 V Total accuracy, V(AC):2V to 4.7V, –15mA load, VO(RTC_OUT) RTC_OUT output voltage –5% 5% V(BAT1)=V(BAT2)=V(USB)=0V Load regulation, V(AC)=3.5V, 1% load: 1mA → –15mA Line regulation, 5mA load,V(AC): 3.5V →18V, 1% V(BAT1) =V(BAT2) =V(USB) =0V ISHRTC Short Circuit current limit 20 mA 2.3 2.35 2.45 RTC_OUT power good fault detection V(RTCGOOD) V Falling RTC_OUT pin voltage, set via I 2C threshold 1.8 1.90 2.0 VHYS(RTC) Power good fault detection hysteresis Rising RTC_OUT pin voltage (Referenced to V(RTCGOOD) threshold) 50 75 131 mV VUVLO_RTC Internal RTC UVLO detection threshold VRTC Decreasing –10% 1.5 10% V VUVLO_RTC_HYS UVLO detection hysteresis VRTC Increasing 100 150 200 mV BOOT-UP TIMING TPOR Power-on-reset delay (2) Fixed time, measured from 2V2>UVLO 7.2 8 8.8 ms Fixed time 500 TBOOT Boot-up time ms Accuracy, referenced to TBOOT(tTYP) –10% 10% THOTPLUG Hot plug deglitch time Fixed time 675 750 825 ms TWAKEUP Wakeup pulse width Fixed time 225 250 275 μs TCHECK RTC check wait time Fixed time 2.7 3 3.3 ms TMAX RTC_ON watchdog timer Fixed time 4×TNORTC ms Fixed time 10 TNORTC NORTC pin pulse width value ms Accuracy, relative to TNORTC (TYP) (2) –10% 10% TNOPOWER = KNOPOWER × CNOPOWER 0.25 KNOPOWER NOPOWER pin pulse width const. ms/nF Pulse width accuracy, CNOPOWER < 400nF –25% 25% TWAIT Reboot and sleep request timeout Fixed time 18 20 22 ms TWAIT1 4.5 5 5.5 ms TSYNCEND Synchronization complete delay Measured from all supplies synchronized 4.5 5 5.5 ms TSYNCDLY(TYP) = 1.25, 2.5, 3.75, 15, Regulator specific. See Table 3-17 20, 32, 40, 64 TSYNCDLY Supply sync delay time ms Accuracy, relative to TSYNCDLY(TYP) (2) -10 +10 POWER GOOD AND THERMAL FAULT DETECTION Applies to all non-masked power good signals, output voltage TDGL(PGFLT) Power good deglitch time 4 5 6 ms falling edge. TSHUT Thermal shutdown Increasing junction temperature 150 °C THYS(SHUT) Thermal shutdown hysteresis Decreasing junction temperature 30 °C TDGL(TSHUT) Thermal shutdown detection delay Rising temperature 15 20 25 μs (1) Setting the RTC_OUT output voltage below the RTC_OUT power good threshold will result in a NORTC pulse being always generated during reboot cycles or when exiting sleep. Setting the RTC_OUT output voltage below VUVLO_RTC disables the use of the internal real time clock counter and xtal oscillator. (2) Not production tested. Copyright © 2009, Texas Instruments Incorporated ELECTRICAL SPECIFICATIONS 7 Submit Documentation Feedback Product Folder Link(s): TPS658621A |
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