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FM3135 Fiches technique(PDF) 6 Page - Ramtron International Corporation

No de pièce FM3135
Description  Integrated RTC/Alarm/F-RAM & Embedded Crystal
Download  21 Pages
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Fabricant  RAMTRON [Ramtron International Corporation]
Site Internet  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM3135 Fiches technique(HTML) 6 Page - Ramtron International Corporation

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FM3135 Integrated RTC/Alarm/FRAM & Embedded Crystal
Rev. 1.2
Feb. 2009
Page 6 of 21
26
512.0567
512.0589
110.68
115.01
011010
27
512.0589
512.0611
115.02
119.35
011011
28
512.0611
512.0633
119.36
123.69
011100
29
512.0633
512.0656
123.70
128.03
011101
30
512.0656
512.0678
128.04
132.37
011110
31
512.0678
512.0700
132.38
136.71
011111
Alarm
The alarm function compares user-programmed
alarm values to the corresponding RTC time/date
values. When a match occurs, an alarm event occurs.
The alarm event sets an internal flag AF (register
00h, bit 6) and drives the ACS pin low, if the
appropriate control bits are set in registers 00h and
0Eh. See Table 3. The alarm condition on the ACS
pin and the AF bit are cleared by reading register
00h.
The alarm operates under VDD or VBAK power. If the
system controller is being used to detect an alarm
while the FM3135 is powered on VBAK only, the ACS
pin may cause extra IBAK current when the alarm is
activated. To avoid battery drain, the ACS pin can be
tri-stated by reading the AF flag, located in the
RTC/Alarm Control register 00h.
There are five alarm match fields. They are Month,
Date, Hours, Minutes, and Seconds. Each of these
fields also has a Match bit that is used to determine if
the field is used in the alarm match logic. Setting the
Match bit to ‘0’ indicates that the corresponding field
will be used in the match process.
Depending on the Match bits, the alarm can occur as
specifically as one particular second on one day of
the month, or as frequently as once per second
continuously. The MSB of each Alarm register is a
Match bit. Examples of the Match bit settings are
shown in Table 4. Alarm Match Bit Examples.
Selecting none of the match bits (all ‘1’s) indicates
that no match is required. The alarm occurs every
second. Setting the match select bit for seconds to ‘0’
causes the logic to match the seconds alarm value to
the current time of day. Since a match will occur for
only one value per minute, the alarm occurs once per
minute. Likewise setting the seconds and minutes
match select bits causes an exact match of these
values. Thus, an alarm will occur once per hour.
Setting seconds, minutes, and hours causes a match
once per day. See Table 4 for other alarm setting
examples.
Function of the ACS Pin
The ACS pin is a multifunction pin. The alarm,
calibration, and square wave functions all share this
output. There are two ways a user can detect an alarm
event, by reading the AF flag or by monitoring the
ACS pin. An interrupt pin on the host processor may
be used to detect an alarm event. The AF flag in the
register 00h (bit 6) will indicate that a time/date
match has occurred. When a match occurs, the AF
bit will be set to ‘1’ and the ACS pin will drive low.
The flag and ACS pin will remain in this state until
the RTC/Alarm Control register is read which clears
the AF bit.
Table 3 that shows the relationship between register
control settings and the function of the ACS pin.
Table 3. Control Bit Settings for ACS Pin
State of Register Bit
Function of
ACS pin
CAL
AEN
AL/SW
0
1
1
/Alarm
0
X
0
Sq Wave out
1
X
X
512 Hz out
0
0
1
Hi-Z


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