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SI-3012KS Fiches technique(PDF) 3 Page - Allegro MicroSystems

No de pièce SI-3012KS
Description  Surface-Mount, Low Current Consumption, Low Dropout Voltage Linear Regulator ICs
Download  6 Pages
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Fabricant  ALLEGRO [Allegro MicroSystems]
Site Internet  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

SI-3012KS Fiches technique(HTML) 3 Page - Allegro MicroSystems

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sReference Data
Thermal resistance vs. Copper area
Power dissipation vs. Copper area
sExample of Solder Pattern Design
Symbol
Dimensions (mm)
e1
5.72
e
1.27
±0.15
α
0.2
β1
0.2 to 0.5
β2
0.2
L
0.6
b2
0.76
l2
L+
β1+β2
*1 The inner frame stage on which a monolithic IC is mounted is
directly connected to the GND pins (pins 5 through 8). By
expanding the area of the copper connected to the GND pins,
the heat radiation can be improved. It is recommended to
design the solder pattern by opening the insulation film of the
solder patterns of pins 5, 6, 7, and 8, on the wide GND
pattern as shown in Figure 1.
(Reference value conforming to EIAJ
Standard ED-7402-1)
• Calculating junction temperature
Measure the temperature TL of the lead of the GND pin (pin 7) by using a thermocouple, and substitute the
measured value into the following expression to calculate the junction temperature.
Tj=PD
× θj–L + TL
(
θj–L = 22°C/W)
qSI-3000KS Series
L
e
L
L
α
B1
B2
e
e1
b
e
ee
e
e1
l2
b2
*1
Figure 1
ee
e
8
GND pattern
1
7
2
6
3
5
b2
e1
l2
4
Copper area (mm2)
10
100
140
120
100
80
60
40
1000
Area of PC board : 40
×40mm
Copper area (mm2)
10
100
1.2
1
0.8
0.6
0.4
0.2
0
1000
Tj=100
°C Area of PC board : 40×40mm
Ta=25
°C
Ta=50
°C
Ta=80
°C


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