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CS2200CP-CZZ Fiches technique(PDF) 1 Page - Cirrus Logic |
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CS2200CP-CZZ Fiches technique(HTML) 1 Page - Cirrus Logic |
1 / 26 page Copyright Cirrus Logic, Inc. 2009 (All Rights Reserved) http://www.cirrus.com Fractional-N Frequency Synthesizer Features Delta-Sigma Fractional-N Frequency Synthesis – Generates a Low Jitter 6 - 75 MHz Clock from an 8 - 75 MHz Reference Clock Highly Accurate PLL Multiplication Factor – Maximum Error Less Than 1 PPM I²C™ / SPI™ Control Port Configurable Auxiliary Output – Buffered Reference Clock – PLL Lock Indication – Duplicate PLL Output Flexible Sourcing of Reference Clock – External Oscillator or Clock Source – Supports Inexpensive Local Crystal Minimal Board Space Required – No External Analog Loop-filter Components General Description The CS2200-CP is an extremely versatile system clock- ing device that utilizes a programmable phase lock loop. The CS2200-CP is based on an analog PLL architec- ture comprised of a Delta-Sigma Fractional-N Frequency Synthesizer. This architecture allows for fre- quency synthesis and clock generation from a stable reference clock. The CS2200-CP supports both I²C and SPI for full soft- ware control. The CS2200-CP is available in a 10-pin MSOP package in Commercial (-10 °C to +70 °C) grade. Customer development kits are also available for device evaluation. Please see “Ordering Information” on page 25 for complete details. I²C / SPI Auxiliary Output 6 to 75 MHz PLL Output 3.3 V I²C/SPI Software Control 8 MHz to 75 MHz Low-Jitter Timing Reference Output to Input Clock Ratio N Timing Reference PLL Output PLL Lock Indicator Fractional-N Divider Voltage Controlled Oscillator Internal Loop Filter Phase Comparator Delta-Sigma Modulator AUG '09 DS759F1 CS2200-CP |
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