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TDA8025HN Fiches technique(PDF) 7 Page - NXP Semiconductors

No de pièce TDA8025HN
Description  IC card interface
Download  38 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

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TDA8025_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 6 April 2009
7 of 38
NXP Semiconductors
TDA8025
IC card interface
8.
Functional description
Remark: Throughout this document the ISO7816 terminology conventions have been
adhered to and it is assumed that the reader is familiar with these.
8.1 Power supplies
Two supply selections can be made using pin CONFIG (see Figure 3) depending on the
active state of the pin:
pin CONFIG is LOW: supply is pin VDDI(REG). The voltage range of the pin is between
3.6 V and 5.5 V. The regulator output range is between 3 V and 3.6 V.
pin CONFIG is HIGH: supply pins VDDI(REG) and VDD(INTREGD) are connected together
to bypass the regulator. Pin VDDI(REG) voltage is between 3 V and 3.6 V.
Remark: VDD(INTF) must not exceed VDD(INTREGD) + 0.3 V.
The following examples illustrate the voltage restrictions for VDD(INTF).
CONFIG pin driven to GND: when VDD(INTREGD) is generated by the internal regulator,
VDD(INTF) must not exceed 3.3 V.
CONFIG pin is driven by VDDI(REG) without VDD(INTF) tied to VDDI(REG) while
VDD(INTREGD) is tied to VDDI(REG): VDD(INTF) must not exceed VDDI(REG) + 0.3 V.
CONFIG pin is driven by VDDI(REG) with VDD(INTF) tied to both VDDI(REG) and
VDD(INTREGD): there no are restrictions for VDD(INTF).
The TDA8025 is held in the reset state until VDD(INTREGD) reaches Vth +Vhys and
PORADJ Vth +Vhys plus the tw(POR) delay. If the VDD(INTREGD) and PORADJ signals fall
below Vth, an automatic contact deactivation is triggered.
All interface signals to the microcontroller are referenced to VDD(INTF). In addition, all card
contacts remain inactive during power-up and power-down cycles.
3.6V<VDDI(REG) <5.5 V
3V<VDD(INTREGD) < 3.6 V
Fig 3.
Power strategy
001aai959
470 nF
100 nF
10
µF
10
µF
220 nF
REGULATOR
INTERNAL
REFERENCE
VOLTAGE
SENSE
SUPPLY
VCC
LOOP
18
21
16
20
19
VDDI(REG)
CONFIG
GND
VDD(INTREGD)
VCC
14 CGND
001aai960
470 nF
100 nF
10
µF
220 nF
REGULATOR
INTERNAL
REFERENCE
VOLTAGE
SENSE
SUPPLY
VCC
LOOP
18
21
16
20
19
VDDI(REG)
CONFIG
GND
VDD(INTREGD)
VCC
14 CGND


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