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TPS62273DRV Fiches technique(PDF) 4 Page - Texas Instruments |
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TPS62273DRV Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 24 page PIN ASSIGNMENTS SW VSEL FB EN GND VIN 1 2 3 4 5 6 TopviewDRVpackage Zero-Pole AMP. Integrator Error Amp. PFMComparator PWM Comp. VREF Control Stage GateDriver Anti Shoot-Through Current LimitComparator Current LimitComparator VREF+1% FB FB VIN GND 2.25MHz Oscillator SW1 EN VIN Softstart VOUT RAMP CONTROL Thermal Shutdown Reference 0.6VVREF Undervoltage Lockout1.8V Limit HighSide Limit LowSide Sawtooth Generator FB RI1 RI..N VSEL GND InternalVoltage SettingNetwork TPS62270, TPS62272 TPS62273 SLVS799C – NOVEMBER 2007 – REVISED JANUARY 2009 ........................................................................................................................................... www.ti.com TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NO. NAME (SON) VIN 5 PWR VIN power supply pin. GND 6 PWR GND supply pin EN 4 I This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin to high enables the device. This pin must be terminated. SW 1 OUT This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this terminal FB 3 I Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed output voltage option, connect this pin directly to the output capacitor VSEL 2 I Voltage Select input. Please refer to table ordering information for available output voltage selections. FUNCTIONAL BLOCK DIAGRAM 4 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): TPS62270 TPS62272 TPS62273 |
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