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TPS53114PWPR Fiches technique(PDF) 2 Page - Texas Instruments |
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TPS53114PWPR Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 20 page TYPICAL APPLICATION CIRCUIT TPS53114PWP (TSSOP16) SW DRVL DRVH VBST EN VO VFB GND VREG5 TRIP PGND C3 C1 10 Fx2 m L1 R2 R1 C2 0.1 F m Q1 Q2 VO C5 4.7 F m C6 1 F m R3 1 16 10 13 14 15 8 11 12 4 6 7 VIN FSEL V5FILT 9 CER 5 3 SS VIN 2 C4 VIN C7 THERMAL PAD PGND PGND SGND ABSOLUTE MAXIMUM RATINGS TPS53114 SLVS887 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA PACKAGE ORDERING PART NUMBER PINS OUTPUT SUPPLY ECO PLAN TPS53114PWPR Tape-and-Reel Green HTSSOP(Thermal –40°C to 85°C 16 (RoHS & no Sb/Br) Pad) TPS53114PWP Tube Operating under free-air temperature range (unless otherwise noted) (1) VALUE UNIT Input voltage range VIN, EN –0.3 to 26 VBST –0.3 to 32 VBST(wrt SW) –0.3 to 6 V V5FILT, VFB, TRIP, VO, FSEL, CER –0.3 to 6 SW –2 to 26 Output voltage DRVH –1 to 32 range DRVH (wrt SW) –0.3 to 6 V DRVL, VREG5, SS –0.3 to 6 PGND –0.3 to 0.3 TA Operating ambient temperature range –40 to 85 TSTG Storage temperature range –55 to 150 °C TJ Junction temperature range –40 to 150 (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS53114 |
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