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TPS1101PW Fiches technique(PDF) 1 Page - Texas Instruments |
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TPS1101PW Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 10 page TPS1101, TPS1101Y SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS079C – DECEMBER 1993 – REVISED AUGUST 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Low rDS(on) . . . 0.09 Ω Typ at VGS = –10 V D 3 V Compatible D Requires No External VCC D TTL and CMOS Compatible Inputs D VGS(th) = –1.5 V Max D Available in Ultrathin TSSOP Package (PW) D ESD Protection Up to 2 kV per MIL-STD-883C, Method 3015 description The TPS1101 is a single, low-rDS(on), P-channel, enhancement-mode MOSFET. The device has been optimized for 3-V or 5-V power distribution in battery-powered systems by means of the Texas Instruments LinBiCMOS ™ process. With a maximum VGS(th) of –1.5 V and an IDSS of only 0.5 µA, the TPS1101 is the ideal high-side switch for low-voltage, portable battery-management systems where maximizing battery life is a primary concern. The low rDS(on) and excellent ac characteristics (rise time 5.5 ns typical) of the TPS1101 make it the logical choice for low-voltage switching applications such as power switches for pulse-width-modulated (PWM) controllers or motor/bridge drivers. The ultrathin thin shrink small-outline package or TSSOP (PW) version fits in height-restricted places where other P-channel MOSFETs cannot. The size advantage is especially important where board height restrictions do not allow for an small-outline integrated circuit (SOIC) package. Such applications include notebook computers, personal digital assistants (PDAs), cellular telephones, and PCMCIA cards. For existing designs, the D-packaged version has a pinout common with other P-channel MOSFETs in SOIC packages. AVAILABLE OPTIONS PACKAGED DEVICES† CHIP FORM TJ SMALL OUTLINE (D) TSSOP (PW) CHIP FORM (Y) –40 °C to 150°C TPS1101D TPS1101PWLE TPS1101Y † The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS1101DR). The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TPS1101PWLE). The chip form is tested at 25 °C. Copyright © 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments Incorporated. 1 2 3 4 8 7 6 5 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN D PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC SOURCE SOURCE SOURCE SOURCE SOURCE GATE NC NC DRAIN DRAIN DRAIN DRAIN DRAIN DRAIN NC PW PACKAGE (TOP VIEW) NC – No internal connection D PACKAGE PW PACKAGE |
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