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CAT5401WI-25 Fiches technique(PDF) 1 Page - ON Semiconductor |
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CAT5401WI-25 Fiches technique(HTML) 1 Page - ON Semiconductor |
1 / 15 page CAT5401 © 2008 SCILLC. All rights reserved. 1 Doc. No. MD-2012 Rev. I Characteristics subject to change without notice Quad Digitally Programmable Potentiometers (DPP™) with 64 Taps and SPI Interface FEATURES Four linear taper digitally programmable potentiometers 64 resistor taps per potentiometer End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ Potentiometer control and memory access via SPI interface: Mode (0, 0) and (1, 1) Low wiper resistance, typically 100Ω Nonvolatile memory storage for up to four wiper settings for each potentiometer Automatic recall of saved wiper settings at power up 2.5 to 6.0 volt operation Standby current less than 1µA 1,000,000 nonvolatile WRITE cycles 100 year nonvolatile memory data retention 24-lead SOIC and 24-lead TSSOP Industrial temperature range For Ordering Information details, see page 14. PIN CONFIGURATION DESCRIPTION The CAT5401 is four Digitally Programmable Potentiometers (DPPs™) integrated with control logic and 16 bytes of NVRAM memory. Each DPP consists of a series of 63 resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 6-bit control register (WCR) independently controls the wiper tap switches for each DPP. Associated with each wiper control register are four 6-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the four potentiometers is automatically loaded into its respective wiper control register. The CAT5401 can be used as a potentiometer or as a two terminal, variable resistor. It is intended for circuit level or system level adjustments in a wide variety of applications. FUNCTIONAL DIAGRAM 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 CAT 5401 VCC RL0 RH0 RW0 CS WP SI A1 RL1 RH1 RW1 GND NC RL3 RH3 RW3 A0 SO HOLD SCK RL2 RH2 RW2 NC 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 CAT 5401 SI A1 RL1 RH1 RW1 GND NC RW2 RH2 RL2 SCK HOLD WP CS RW0 RH0 RL0 VCC NC RL3 RH3 RW3 A0 SO SOIC Package (W) TSSOP Package (Y) NONVOLATILE DATA REGISTERS CONTROL LOGIC WIPER CONTROL REGISTERS SPI BUS INTERFACE RW0 RW1 RW2 RW3 RL0 A0 A1 CS SCK SI SO RL1 RL2 RL3 RH0 RH1 RH2 RH3 WP |
Numéro de pièce similaire - CAT5401WI-25 |
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Description similaire - CAT5401WI-25 |
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