SN54HC174, SN74HC174

HEX D-TYPE FLIP-FLOPS

WITH CLEAR

SCLS119B – DECEMBER 1982 – REVISED MAY 1997

1

POST OFFICE BOX 655303

Outputs

– Buffer/Storage Registers

– Shift Registers

– Pattern Generators

Small-Outline (D) and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

description

These monolithic positive-edge-triggered D-type

flip-flops have a direct clear (CLR) input.

Information at the data (D) inputs meeting the

setup time requirements is transferred to the

outputs on the positive-going edge of the clock

(CLK) pulse. Clock triggering occurs at a

particular voltage level and is not directly related

to the transition time of the positive-going edge of

CLK. When CLK is at either the high or low level,

the D input has no effect at the output.

The SN54HC174 is characterized for operation

over the full military temperature range of –55

°C

to 125

°C. The SN74HC174 is characterized for

operation from –40

°C to 85°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

CLR

CLK

D

Q

L

X

X

L

H

↑

HH

H

↑

LL

H

L

X

Q0

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54HC174 ...J OR W PACKAGE

SN74HC174 . . . D OR N PACKAGE

(TOP VIEW)

32

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

6D

5D

NC

5Q

4D

1D

2D

NC

2Q

3D

SN54HC174 . . . FK PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

CLR

1Q

1D

2D

2Q

3D

3Q

GND

6Q

6D

5D

5Q

4D

4Q

CLK

NC – No internal connection

Copyright

© 1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.