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SN74AHCT174DGV Fiches technique(PDF) 3 Page - Texas Instruments |
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SN74AHCT174DGV Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 6 page SN54AHCT174, SN74AHCT174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS419E – JUNE 1998 – REVISED JANUARY 2000 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 3) SN54AHCT174 SN74AHCT174 UNIT MIN MAX MIN MAX UNIT VCC Supply voltage 4.5 5.5 4.5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 VCC 0 VCC V IOH High-level output current –8 –8 mA IOL Low-level output current 8 8 mA ∆t/∆v Input transition rise or fall time 20 20 ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C SN54AHCT174 SN74AHCT174 UNIT PARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT V IOH = –50 mA 45 V 4.4 4.5 4.4 4.4 V VOH IOH = –8 mA 4.5 V 3.94 3.8 3.8 V V IOL = 50 mA 45 V 0.1 0.1 0.1 V VOL IOL = 8 mA 4.5 V 0.36 0.44 0.44 V II VI = VCC or GND 0 V to 5.5 V ±0.1 ±1* ±1 mA ICC VI = VCC or GND, IO = 0 5.5 V 4 40 40 mA ∆ICC† One input at 3.4 V, Other inputs at VCC or GND 5.5 V 1.35 1.5 1.5 mA Ci VI = VCC or GND 5 V 2 10 10 pF * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. † This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or VCC. timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) TA = 25°C SN54AHCT174 SN74AHCT174 UNIT MIN MAX MIN MAX MIN MAX UNIT t Pulse duration CLR low 5 5 5 ns tw Pulse duration CLK high or low 5 5 5 ns t Setup time before CLK ↑ Data 5 5 5 ns tsu Setup time before CLK ↑ CLR inactive 3.5 3.5 3.5 ns th Hold time, data after CLK ↑ 0 0 0 ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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