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TC850CLW Fiches technique(PDF) 2 Page - TelCom Semiconductor, Inc |
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TC850CLW Fiches technique(HTML) 2 Page - TelCom Semiconductor, Inc |
2 / 14 page 3-78 TELCOM SEMICONDUCTOR, INC. ABSOLUTE MAXIMUM RATINGS* Positive Supply Voltage (VDD to GND) ....................... +6V Negative Supply Voltage (VSS to GND) .....................– 9V Analog Input voltage (IN+ or IN–) ..................... VDD to VSS Voltage Reference Input (REF1+, REF1–, REF2+) .............................. VDD to VSS Logic Input Voltage ................ VDD + 0.3V to GND – 0.3V Current Into Any Pin ................................................. 10mA While Operating ................................................ 100 µA Ambient Operating Temperature Range C Device ................................................ 0 °C to +70°C I Device ............................................. – 25 °C to +85°C ELECTRICAL CHARACTERISTICS: VS = ±5V, fCLK = 61.44 kHz, VFS = 3.2768V, TA = 25°C, Fig. 1 Test Circuit, unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Unit Zero-Scale Error VIN = 0V ±0.25 ±0.5 LSB End Point Linearity Error –VFS ≤ VIN ≤ +VFS — ±1 ±2 LSB Differential Nonlinearity — ±0.1 ±0.5 LSB IIN Input Leakage Current VIN = 0V, TA = 25°C — 30 75 pA 0 °C ≤ TA ≤ +70°C ——— – 25 ° ≤ TA ≤ +85°C — 1.1 3 nA VCMR Common-Mode Voltage Range Over Operating Temperature Range VSS + 1.5 — VDD – 1.5 V CMRR Common-Mode Rejection Ratio VIN = 0V, VCM = ±1V — 80 — dB Full-Scale Gain Temperature External Ref Temperature Coefficient Coefficient = 0 ppm/ °C — 2 5 ppm/ °C 0 °C ≤ TA ≤ +70°C Zero-Scale Error VIN = 0V — 0.3 2 µV/°C Temperature Coefficient 0 °C ≤ TA ≤ +70°C Full-Scale Magnitude VIN = ±3.275V — 0.5 2 LSB Symmetry Error eN Input Noise Not Exceeded 95% of Time — 30 — µVP-P IS+ Positive Supply Current — 2 3.5 mA IS– Negative Supply Current — 2 3.5 mA VOH Output High Voltage IO = 500 µA 3.5 4.9 — V VOL Output Low Voltage IO = 1.6 mA — 0.15 0.4 V IOP Output Leakage Current Pins 8 – 15, High-Impedance State — 0.1 1 µA VIH Input High Voltage Note 3 3.5 2.3 — V IL Input Low Voltage Note 3 — 2.1 1 V IPU Input Pull-Up Current Pins 2, 3, 4, 6, 7; VIN = 0V — 4 — µA IPD Input Pull-Down Current Pins 1, 5; VIN = 5V — 14 — µA IOSC Oscillator Output Current Pin 18, VOUT = 2.5V — 140 — µA CIN Input Capacitance Pins 1 – 7, 17 — 1 — pF COUT Output Capacitance Pins 8 – 15, High-Impedance State — 15 — pF tCE Chip-Enable Access Time CS or CE, RD = LOW (Note 1) — 230 450 nsec tRE Read-Enable Access Time CS = HIGH, CE = LOW (Note 1) — 190 450 nsec tDHC Data Hold From CS or CE RD = LOW (Note 1) — 250 450 nsec tDHR Data Hold From RD CS = HIGH, CE = LOW (Note 1) — 210 450 nsec tOP OVR/POL Data Access Time CS = HIGH, CE = LOW, RD = LOW (Note 1) — 140 300 nsec Lead Temperature (Soldering, 10 sec) ................. +300 °C Package Power Dissipation (TA ≤ 70°C) CerDIP .............................................................. 2.29W Plastic DIP ........................................................ 1.23W Plastic PLCC .................................................... 1.23W *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. 15-BIT, FAST-INTEGRATING CMOS ANALOG-TO-DIGITAL CONVERTER TC850 |
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