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74LVT574PW Fiches technique(PDF) 9 Page - NXP Semiconductors |
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74LVT574PW Fiches technique(HTML) 9 Page - NXP Semiconductors |
9 / 16 page 74LVT_LVTH574_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 11 September 2008 9 of 16 NXP Semiconductors 74LVT574; 74LVTH574 3.3 V octal D-type flip-flop; 3-state Table 8. Measurement points Input Output VM VM VX VY 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V Test data is given in Table 9. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig 10. Load circuitry for switching times VEXT VCC VI VO 001aae235 DUT CL RT RL RL PULSE GENERATOR VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf Table 9. Test data Input Load VEXT VI fi tW tr, tf CL RL tPHZ, tPZH tPLZ, tPZL tPLH, tPHL 2.7 V ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6 V open |
Numéro de pièce similaire - 74LVT574PW |
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Description similaire - 74LVT574PW |
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