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TPS71433DRVR Fiches technique(PDF) 8 Page - Texas Instruments |
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TPS71433DRVR Fiches technique(HTML) 8 Page - Texas Instruments |
8 / 16 page Programming the TPS71401 Adjustable LDO Regulator V OUT + VREF 1 ) R1 R2 (3) R1 + V OUT V REF * 1 R2 (4) OUTPUTVOLTAGE PROGRAMMINGGUIDE OUTPUT VOLTAGE R1 R2 1.8V 2.8V 5.0V 392MW 1.07MW 2.55MW 806kW 806kW 806kW V IN FB GND IN 0.1 F m TPS71401 OUT 0.47 F m V OUT R1 R2 TPS714xx SBVS116 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com The output voltage of the TPS71401 adjustable regulator is programmed using an external resistor divider as shown in Figure 16. The output voltage is calculated using Equation 3: where: VREF = 1.205V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately a 1.5 µA divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided because leakage current out of the FB pin across R1/R2 creates an offset voltage that artificially increases the feedback voltage and thus erroneously decreases VOUT. The recommended design procedure is to choose R2 = 1M Ω to set the divider current at 1.5 µA, and then calculate R1 using Equation 4: Figure 16. TPS71401 Adjustable LDO Regulator Programming 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated |
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