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ST92F250CR9T6 Fiches technique(PDF) 1 Page - STMicroelectronics |
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ST92F250CR9T6 Fiches technique(HTML) 1 Page - STMicroelectronics |
1 / 426 page November 2004 1/426 Rev. 4.0 ST92F124/ST92F150/ST92F250 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD ■ Memories – Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulat- ed EEPROM) – In-Application Programming (IAP) – 224 general purpose registers (register file) availa- ble as RAM, accumulators or index pointers ■ Clock, Reset and Supply Management – Register-oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP modes – 0-24 MHz Operation (Int. Clock), 4.5-5.5 V range – PLL Clock Generator (3-5 MHz crystal) – Minimum instruction time: 83 ns (24 MHz int. clock) ■ Up to 80 I/O pins ■ Interrupt Management – 4 external fast interrupts + 1 NMI – Up to 16 pins programmable as wake-up or addition- al external interrupt with multi-level interrupt handler ■ DMA controller for reduced processor overhead ■ Timers – 16-bit Timer with 8-bit Prescaler, and Watchdog Tim- er (activated by software or by hardware) – 16-bit Standard Timer that can be used to generate a time base independent of PLL Clock Generator – Two 16-bit independent Extended Function Timers (EFTs) with Prescaler, up to two Input Captures and up to two Output Compares – Two 16-bit Multifunction Timers, with Prescaler, up to two Input Captures and up to two Output Com- pares ■ Communication Interfaces – Serial Peripheral Interface (SPI) with Selectable Master/Slave mode – One Multiprotocol Serial Communications Interface with asynchronous and synchronous capabilities – One asynchronous Serial Communications Interface with 13-bit LIN Synch Break generation capability – J1850 Byte Level Protocol Decoder (JBLPD) – Up to two full I²C multiple Master/Slave Interfaces supporting Access Bus – Up to two CAN 2.0B Active interfaces ■ Analog peripheral (low current coupling) – 10-bit A/D Converter witvalh up to 16 robust input channels ■ Development Tools – Free High performance Development environment (IDE) based on Visual Debugger, Assembler, Linker, and C-Compiler; Real Time Operating System (OS- EK OS, CMX) and CAN drivers – Hardware Emulator and Flash Programming Board for development and ISP Flasher for production DEVICE SUMMARY 2) 1) see Section 12.4 on page 406 for important information 2) see Table 71 on page 403 for the list of supported part numbers PQFP100 14x20 TQFP64 14x14 TQFP100 14x14 Features ST92F124R9 ST92F124V1 ST92F150CR9/1 ST92F150CV9/1 ST92F150JDV1 ST92F250CV2 FLASH - bytes 64K 128K 64K/128K 64K/128K 128K 256K RAM - bytes 2K 4K 2K/4K 2K/4K 6K 8K E3 TM - bytes 1K 1K 1K 1K 1K 1K Timers and Serial Interface 2 MFT, 2 EFT, STIM, WD, SCI, SPI, I²C 2 MFT, 2 EFT, STIM, WD, 2 SCI, SPI, I²C 2 MFT, 2 EFT, STIM, WD, SCI, SPI, I²C 2 MFT, 2 EFT, STIM, WD, 2 SCI, SPI, I²C 2 MFT, 2 EFT, STIM, WD, 2 SCI, SPI, I²C 2 MFT, 2 EFT, STIM, WD, 2 SCI, SPI, 2 I²C 1) ADC 16 x 10 bits 16 x 10 bits 16 x 10 bits 16 x 10 bits 16 x 10 bits 16 x 10 bits Network Inter- face - LIN Master CAN CAN, LIN Master 2 CAN,J1850, LIN Master CAN, LIN Master Packages TQFP64 P/TQFP100 TQFP64 P/TQFP100 P/TQFP100 9 |
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