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FIN12ACGFX Fiches technique(PDF) 9 Page - Fairchild Semiconductor |
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FIN12ACGFX Fiches technique(HTML) 9 Page - Fairchild Semiconductor |
9 / 21 page © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN12AC Rev. 1.1.2 9 STROBE Pass-Through Mode For some applications, it is desirable to pass a word clock across a differential signal pair in the opposite direction of serialization. The FIN12AC supports this mode of operation. For the deserializer: 1. DIRI = LOW 2. CKREF = LOW 3. Word clock should be connected to the STROBE. This passes the STROBE signal out the CKSO port. For the serializer: 1. Connect CKSO of the deserializer to CKSI of the serializer. 2. CKSI passes the signal to CKP. When PLL-bypass mode is used, the bit clock toggles on the CKP signal. Table 2. Control I/O Flex Circuit Design Guidelines The serial I/O information is transmitted at a high serial rate. Care must be taken implementing this serial I/O flex cable. The following best practices should be used when developing the flex cabling or Flex PCB: ■ Keep all four differential wires the same length. ■ Allow no noisy signals over or near differential serial wires. Example: No LVCMOS traces over differential wires. ■ Use only one ground plane or wire over the differential serial wires. Do not run ground over top and bottom. ■ Do not place test points on differential serial wires. ■ Use differential serial wires a minimum of 2cm away from the antenna. Mode Number DIRI DIRO CKSO CKP Mode of Operation 0 x Z Z Z Power Down Mode: S2 = 0, S1 = 0 1, 2, 3 0 1 CKSO = STROBE Deserializer Output STROBE Deserializer: Any active mode 1, 2, 3 1 0 Serializer Output Bit Clock CKSI Serializer: Any active mode |
Numéro de pièce similaire - FIN12ACGFX |
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