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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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FAN400CTY Fiches technique(PDF) 9 Page - Fairchild Semiconductor |
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FAN400CTY Fiches technique(HTML) 9 Page - Fairchild Semiconductor |
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9 / 14 page  © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN400C • Rev. 1.0.1 9 Operation Description FAN400C devices integrate many useful functions for low-power switch-mode power supplies. The following descriptions highlight the key features of the FAN400C. Startup Current The required startup current is only 8mA, which allows a high-resistance, low-wattage startup resistor to supply the controller’s startup power. A 1.5M Ω/0.25W startup resistor can be used over a wide input range (100V- 240VAC) with very little power loss. Operating Current The operating current is normally 3.6mA, which results in higher efficiency and reduces the required VDD hold- up capacitance. A 10μF/25V VDD hold-up capacitor can be used over a wide input range (100V-240VAC) with very little power loss. Green-Mode Operation The proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load and zero-load conditions. The on-time is limited to provide better protection against brownouts and other abnormal conditions. Power supplies using the FAN400C can meet international restrictions regarding standby power-consumption. Current (CC) without Feedback The FAN400C can provide over-current protection without requiring secondary-side feedback signals. For improved CV and CC accuracy, the transformer leakage inductance should be reduced as much as possible. Over-Temperature Protection (OTP) The FAN400C has a built-in temperature-sensing circuit to shut down PWM output once the junction temperature exceeds 140 °C. While PWM output is shut down, the VDD voltage gradually drops to the UVLO voltage. Some of the internal circuits are shut down and VDD gradually starts increasing again. When VDD reaches 17V, all the internal circuits, including the temperature-sensing circuit, operate normally. If the junction temperature is still higher than 140 °C, the PWM controller shuts down immediately. This situation continues until the temperature drops below 110 °C. The PWM output is then turned back on. The temperature hysteresis window for the OTP circuit is 30 °C. VDD Over-Voltage Clamping VDD over-voltage clamping prevents damage from over- voltage conditions. When VDD exceeds 24.5V, PWM output is shut down. Over-voltage conditions may be caused by an open photo-coupler loop or a short circuit in the output. Oscillator Operation The oscillation frequency is fixed at 65KHz. Leading-Edge Blanking (LEB) Each time the power MOSFET is switched on, a turn-on spike occurs at the sense-resistor. To avoid premature termination of the switching pulse, a 310ns leading- edge blanking time is built in. Conventional RC filtering is not necessary. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate drive. Constant Output Power Limit When the SENSE voltage across the sense resistor RS reaches the threshold voltage (around 1.0V), the output GATE drive is turned off following a small propagation delay, tPD. This propagation delay introduces an additional current proportional to tPD•VIN/LP. The propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltages result in larger additional currents. Under high input-line voltages, the output power limit is higher than under low input-line voltages. Over a wide range of AC input voltages, the variation can be significant. To compensate for this, the threshold voltage is adjusted by adding a positive ramp (Vlimit_ramp). This ramp signal can vary from 0.73V to 1.01V and flattens out at 1.01V. A smaller threshold voltage forces the output GATE drive to terminate earlier, reducing total PWM turn-on time and making the output power equal to that of the low-line input. This proprietary internal compensation feature ensures a constant output power limit over a wide range of AC input voltages (90VAC to 264VAC). Under-Voltage Lockout (UVLO) The turn-on/turn-off thresholds are fixed internally at 17V and 8V. To enable the FAN400C during startup, the hold-up capacitor must first be charged to 17V through the startup resistor. The hold-up capacitor continues to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 8V during this startup process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during startup. Gate Output The BiCMOS output stage is a fast totem-pole gate driver. Cross-conduction is avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 17V Zener diode to protect the power MOSFET transistors against any harmful over-voltage gate signals. |
Numéro de pièce similaire - FAN400CTY |
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Description similaire - FAN400CTY |
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