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SMP100LC-160 Fiches technique(PDF) 9 Page - STMicroelectronics |
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SMP100LC-160 Fiches technique(HTML) 9 Page - STMicroelectronics |
9 / 12 page SMP100LC Ordering information scheme 9/12 Figure 17. Test circuit 3 for dynamic IH parameter 3 Ordering information scheme TEST PROCEDURE 1/ Adjust the current level at the I value by short circuiting the AK of the D.U.T. 2/ Fire the D.U.T. with a surge current H ➔ I= 10A, 10/1000µs. 3/ The D.U.T. will come back off-state within 50ms maximum. PP This is a GO-NOGO test which allows to confirm the holding current (I ) level in a functional test circuit. H R V BAT = - 48 V Surge generator D.U.T SMP 100 LC - xxx Trisil Surface Mount Repetitive Peak Pulse Current Capacitance Voltage 100 = 100A LC = Low Capacitance 65 = 65V |
Numéro de pièce similaire - SMP100LC-160 |
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Description similaire - SMP100LC-160 |
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