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TSC251G1DXXX-16CA Fiches technique(PDF) 6 Page - TEMIC Semiconductors |
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TSC251G1DXXX-16CA Fiches technique(HTML) 6 Page - TEMIC Semiconductors |
6 / 52 page TSC87251G1A 6 Rev. A – September 21, 1998 Alternate Function Description Type Signal Name ECI O PCA External Clock input ECI is the external clock input to the 16–bit PCA timer. P1.2 MISO I/O SPI Master Input Slave Output line When SPI is in master mode, MISO receives data from the slave peripheral. When SPI is in slave mode, MISO outputs data to the master controller. P1.5 MOSI I/O SPI Master Output Slave Input line When SPI is in master mode, MOSI outputs data to the slave peripheral. When SPI is in slave mode, MOSI receives data from the master controller. P1.7 INT1:0# I External Interrupts 0 and 1. INT1#/INT0# inputs set IE1:0 in the TCON register. If bits IT1:0 in the TCON register are set, bits IE1:0 are set by a falling edge on INT1#/INT0#. If bits IT1:0 are cleared, bits IE1:0 are set by a low level on INT1#/INT0# P3.3:2 P0.0:7 I/O Port 0 P0 is an 8–bit open–drain bidirectional I/O port. AD7:0 P1.0:7 I/O Port 1 P1 is an 8–bit bidirectional I/O port with internal pull–ups. P1 provides interrupt capability for a keyboard interface. P2.0:7 I/O Port 2 P2 is an 8–bit bidirectional I/O port with internal pull–ups. A15:8 P3.0:7 I/O Port 3 P3 is an 8–bit bidirectional I/O port with internal pull–ups. PROG# O Programming Pulse input The programming pulse is applied to this input for programming the on–chip EPROM/ OTPROM. PSEN# O Program Store Enable/Read signal output PSEN# is asserted for a memory address range that depends on bits RD0 and RD1 in UCON- FIG0 byte (see Table 13). RD# O Read or 17th Address Bit (A16) Read signal output to external data memory depending on the values of bits RD0 and RD1 in UCONFIG0 byte (see Table 13). P3.7 RST I Reset input to the chip Holding this pin high for 64 oscillator periods while the oscillator is running resets the device. The Port pins are driven to their reset conditions when a voltage greater than VIH1 is applied, whether or not the oscillator is running. This pin has an internal pull-down resistor which allows the device to be reset by connecting a capacitor between this pin and VDD. Asserting RST when the chip is in Idle mode or Power–Down mode returns the chip to normal operation. RXD I/O Receive Serial Data RXD sends and receives data in serial I/O mode 0 and receives data in serial modes I/O 1, 2 and 3. P3.0 SCL I/O I2C Serial Clock SCL outputs the serial clock to slave peripherals. P1.6 SCK I/O SPI Serial Clock SCK outputs clock to the slave peripheral. P1.6 SDA I/O I2C Serial Data SDA is the bidirectional I2C data line. P1.7 T1:0 I/O Timer 1:0 External Clock Inputs When timer 1:0 operates as a counter, a falling edge on the T1:0 pin increments the count. |
Numéro de pièce similaire - TSC251G1DXXX-16CA |
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Description similaire - TSC251G1DXXX-16CA |
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