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TSC87251G1A-16IA Fiches technique(PDF) 5 Page - TEMIC Semiconductors |
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TSC87251G1A-16IA Fiches technique(HTML) 5 Page - TEMIC Semiconductors |
5 / 52 page TSC87251G1A 5 Rev. A – September 21, 1998 Table 1. TSC87251G1A Pin Assignment DIP PLCC Name DIP PLCC Name 1 VSS1 23 VSS2 1 2 P1.0/T2 21 24 P2.0/A8 2 3 P1.1/T2EX 22 25 P2.1/A9 3 4 P1.2/ECI 23 26 P2.2/A10 4 5 P1.3/CEX0 24 27 P2.3/A11 5 6 P1.4/CEX1 25 28 P2.4/A12 6 7 P1.5/CEX2/MISO 26 29 P2.5/A13 7 8 P1.6/CEX3/SCL/SCK 27 30 P2.6/A14 8 9 P1.7/A17/CEX4/SDA/MOSI 28 31 P2.7/A15 9 10 RST 29 32 PSEN# 10 11 P3.0/RXD 30 33 ALE/PROG# 12 NC 34 NC 11 13 P3.1/TXD 31 35 EA#/VPP 12 14 P3.2/INT0# 32 36 P0.7/AD7 13 15 P3.3/INT1# 33 37 P0.6/AD6 14 16 P3.4/T0 34 38 P0.5/AD5 15 17 P3.5/T1 35 39 P0.4/AD4 16 18 P3.6/WR# 36 40 P0.3/AD3 17 19 P3.7/A16/RD# 37 41 P0.2/AD2 18 20 XTAL2 38 42 P0.1/AD1 19 21 XTAL1 39 43 P0.0/AD0 20 22 VSS 40 44 VDD 5.2. Signals Table 2. TSC87251G1A Signal Descriptions Signal Name Type Description Alternate Function A17 O 18th Address Bit Output to memory as 18th external address bit (A17) in extended bus applications, depending on the values of bits RD0 and RD1 in UCONFIG0 byte (see Table 13). P1.7 A16 O 17th Address Bit Output to memory as 17th external address bit (A16) in extended bus applications, depending on the values of bits RD0 and RD1 in UCONFIG0 byte (see Table 13). P3.7 A15:8(1) O Address Lines Upper address lines for the external bus. P2.7:0 AD7:0(1) I/O Address/Data Lines Multiplexed lower address lines and data for the external memory. P0.7:0 ALE O Address Latch Enable ALE signals the start of an external bus cycle and indicates that valid address information are available onlines A16/A17 and A7:0. An external latch can use ALE to demultiplex the address from address/databus. CEX4:0 O PCA Input/Output pins CEXx are input signals for the PCA capture mode and output signals for the PCA compare and PWM modes. P1.7:3 EA# I External Access Enable EA# directs program memory accesses to on–chip or off–chip code memory. For EA#= 0, all program memory accesses are off-chip. For EA#= 1, an access is on-chip EPROM/OTPROM if the address is within the range of the on– chip EPROM/OTPROM; otherwise the access is off-chip. The value of EA# is latched at reset. |
Numéro de pièce similaire - TSC87251G1A-16IA |
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Description similaire - TSC87251G1A-16IA |
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