STD20N06 datasheet(1/10 Pages) STMICROELECTRONICS

No de pièce	STD20N06

Description	N - CHANNEL ENHANCEMENT MODE ?쓀LTRA HIGH DENSITY??POWER MOS TRANSISTOR

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STD20N06

N - CHANNEL ENHANCEMENT MODE

”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR

PRELIMINARY DATA

s

TYPICAL RDS(on) = 0.026

Ω

s

AVALANCHE RUGGED TECHNOLOGY

s

100% AVALANCHE TESTED

s

REPETITIVE AVALANCHE DATA AT 100

oC

s

HIGH CURRENT CAPABILITY

s

175

oC OPERATING TEMPERATURE

s

HIGH dV/dt RUGGEDNESS

s

THROUGH-HOLE IPAK (TO-251) POWER

PACKAGE IN TUBE (SUFFIX ”-1”)

s

SURFACE-MOUNTING DPAK (TO-252)

POWER PACKAGE IN TAPE & REEL

(SUFFIX ”T4”)

DESCRIPTION

This series of POWER MOSFETS represents the

latest development in low voltage technology.

The ultra high cell density process (UHD) produ-

ced with fine geometries on advanced equipment

gives the device extremely low RDS(on) as well as

good switching performance and high avalanche

energy capability.

APPLICATIONS

s

HIGH CURRENT, HIGH SPEED SWITCHING

s

POWER MOTOR CONTROL

s

DC-DC & DC-AC CONVERTERS

s

SYNCRONOUS RECTIFICATION

INTERNAL SCHEMATIC DIAGRAM

TYPE

VDSS

R DS(on)

ID

STD20N06

60 V

< 0. 03

Ω

20 A (*)

March 1995

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Uni t

VDS

Drain-source Voltage (VGS =0)

60

V

VDG R

Drain- gate Voltage (RGS =20 k

Ω)60

V

VGS

Gate-source Voltage

± 20

V

ID

Drain Current (cont inuous) at T c =25

oC20

A

ID

Drain Current (cont inuous) at T c =100

oC14

A

IDM(

•)

Drain Current (pulsed)

80

A

Ptot

Total Dissipation at Tc =25

oC60

W

Derating Factor

0.4

W/

oC

Tstg

St orage Temperat ure

-65 to 175

oC

Tj

Max. Operat ing Junction Temperature

175

oC

(*) Current limited by the package

(

•) Pulse width limited by safe operating area (*)

1

3

2

IPAK

TO-251

(Suffix ”-1”)

1

3

DPAK

TO-252

(Suffix ”T4”)

1/10

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