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AD5024BRUZ Datasheet(Fiches technique) 3 Page - Analog Devices

Numéro de pièce AD5024BRUZ
Description  Fully Accurate, 12-/14-/16-Bit VOUT nanoDAC, Quad, SPI Interface, 4.5 V to 5.5 V in TSSOP
Télécharger  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5024BRUZ Datasheet(HTML) 3 Page - Analog Devices

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AD5024/AD5044/AD5064
Rev. 0 | Page 3 of 28
SPECIFICATIONS
VDD = 4.5 V to 5.5 V, RL = 5 kΩ to GND, CL = 200 pF to GND, 2.5 V ≤ VREFIN ≤ VDD, unless otherwise specified. All specifications TMIN to
TMAX, unless otherwise noted.
Table 2.
Parameter
B Grade1
A Grade1, 2
Unit
Conditions/Comments
Min
Typ
Max
Min
Typ
Max
STATIC PERFORMANCE3
Resolution
16
16
Bits
AD5064
14
AD5044
12
AD5024
Relative Accuracy
±0.5
±1
±0.5
±4
LSB
AD5064; TA = −40°C to +105°C
+0.5
±2
±0.5
±4
AD5064; TA = −40°C to +125°C
±0.25
±0.5
LSB
AD5044; TA = −40°C to +105°C
±0.25
±1
AD5044; TA = −40°C to +125°C
±0.12
±0.25
LSB
AD5024; TA = −40°C to +105°C
±0.12
±0.5
AD5024; TA = −40°C to +125°C
Differential Nonlinearity
±0.2
±1
±0.2
±1
LSB
Offset Error
±0.2
±1.8
±0.2
±1.8
mV
Code 512 (AD5064), Code 128 (AD5044),
Code 32 (AD5024) loaded to DAC register
Offset Error Drift4
±2
±2
μV/°C
Full-Scale Error
±0.01
±0.07
±0.01
±0.07
% FSR
All 1s loaded to DAC register. VREF
< VDD
Gain Error
±0.005
±0.05
±0.005
±0.05
% FSR
Gain Temperature Coefficient4
±1
±1
ppm
Of FSR/°C
DC Crosstalk
40
40
μV
Due to single channel full-scale output
change, RL = 5 kΩ to GND or VDD
40
40
μV/mA
Due to load current change
0.5
40
μV
Due to powering down (per channel)
OUTPUT CHARACTERISTICS4
Output Voltage Range
0
VDD
0
VDD
V
Capacitive Load Stability
1
1
nF
RL = 5 kΩ, RL =100 kΩ, and RL = ∞
DC Output Impedance
Normal Mode
0.5
0.5
Ω
Power-Down Mode
Output Connected to
100 kΩ Network
100
100
Output impedance tolerance ± 400 Ω
Output Connected to
1 kΩ Network
1
1
Output impedance tolerance ± 20 Ω
Short-Circuit Current
60
60
mA
DAC = full scale, output shorted to GND
45
45
mA
DAC = zero-scale, output shorted to VDD
Power-Up Time
4.5
4.5
μs
Time to exit power-down mode to normal
mode of AD5024/AD5044/AD5064, 32nd
clock edge to 90% of DAC midscale value,
output unloaded
DC PSRR
−92
−92
dB
VDD ± 10%, DAC = full scale. VREF
< VDD
REFERENCE INPUTS
Reference Input Range
2.5
VDD
2.5
VDD
V
Reference Current
35
50
35
50
μA
Per DAC channel
Reference Input Impedance
120
120
Individual reference option
LOGIC INPUTS
Input Current5
±1
±1
μA
Input Low Voltage, VINL
0.8
0.8
V
Input High Voltage, VINH
2.2
2.2
V
Pin Capacitance4
4
4
pF


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