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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ST90T158 Fiches technique(PDF) 64 Page - STMicroelectronics |
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ST90T158 Fiches technique(HTML) 64 Page - STMicroelectronics |
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64 / 190 page  64/190 ST90158 - ON-CHIP DIRECT MEMORY ACCESS (DMA) 5.3 DMA TRANSACTIONS The purpose of an on-chip DMA channel is to transfer a block of data between a peripheral and the Register File, or Memory. Each DMA transfer consists of three operations: – A load from/to the peripheral data register to/ from a location of Register File (or Memory) ad- dressed through the DMA Address Register (or Register pair) – A post-increment of the DMA Address Register (or Register pair) – A post-decrement of the DMA transaction coun- ter, which contains the number of transactions that have still to be performed. If the DMA transaction is carried out between the peripheral and the Register File (Figure 29), one register is required to hold the DMA Address, and one to hold the DMA transaction counter. These two registers must be located in the Register File: the DMA Address Register in the even address register, and the DMA Transaction Counter in the next register (odd address). They are pointed to by the DMA Transaction Counter Pointer Register (DCPR), located in the peripheral’s paged regis- ters. In order to select a DMA transaction with the Register File, the control bit DCPR.RM (bit 0 of DCPR) must be set. If the transaction is made between the peripheral and Memory, a register pair (16 bits) is required for the DMA Address and the DMA Transaction Counter (Figure 30). Thus, two register pairs must be located in the Register File. The DMA Transaction Counter is pointed to by the DMA Transaction Counter Pointer Register (DCPR), the DMA Address is pointed to by the DMA Address Pointer Register (DAPR),both DCPR and DAPR are located in the paged regis- ters of the peripheral. Figure 29. DMA Between Register File and Peripheral IDCR IVR DAPR DCPR DATA PAGED REGIST ERS REGIST ERS SYSTEM DMA COUNTER DMA ADDRESS FFh F0h E0h DFh EFh MEMORY 0000h DATA ALREADY TRANSFERRED END OF BLOCK INTERRUPT SERVICE ROUTINE DMA TABLE ISR ADDRESS 0100h VECTOR TABLE REGISTER FILE PERIPHERAL PAGED REGISTERS 9 |
Numéro de pièce similaire - ST90T158 |
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Description similaire - ST90T158 |
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