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TPS62260 Fiches technique(PDF) 4 Page - Texas Instruments |
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TPS62260 Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 31 page www.ti.com PIN ASSIGNMENTS V IN GND EN SW FB 1 2 3 5 4 DDCPACKAGE (TOP VIEW) DRV PACKAGE (TOPVIEW) MODE FB GND SW EN VIN 1 2 3 6 5 4 r Po w e P A D FUNCTIONAL BLOCK DIAGRAM Zero-Pole AMP. Integrator Error Amp . PFMComp. +1% Voltagepositioning PWM Comp. VREF Control Stage GateDriver Anti Shoot-Through Current LimitComparator Current LimitComparator VREF +1% FB FB VIN GND MODE 2.25 MHz Oscillator SW1 EN VIN Softstart VOUT RAMP CONTROL Thermal Shutdown Reference 0.6VVREF Undervoltage Lockout 1.8V Limit HighSide Limit LowSide Sawtooth Generator Int. Resistor Network FB RI 1 RI..N Mode Onlyin 2x2SON GND TPS62260, TPS62261 TPS62262, TPS62263 SLVS763B – JUNE 2007 – REVISED FEBRUARY 2008 TERMINAL FUNCTIONS TERMINAL NO. I/O DESCRIPTION NO. NAME SON TSOT23-5 2x2-6 VIN 5 1 PWR VIN power supply pin. GND 6 2 PWR GND supply pin This is the enable pin of the device. Pulling this pin to low forces the device into shutdown EN 4 3 I mode. Pulling this pin to high enables the device. This pin must be terminated. This is the switch pin and is connected to the internal MOSFET switches. Connect the SW 1 5 OUT external inductor between this terminal and the output capacitor. Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. FB 3 4 I In case of fixed output voltage option, connect this pin directly to the output capacitor This pin is only available at SON package option. MODE pin = high forces the device to MODE 2 I operate in fixed frequency PWM mode. MODE pin = low enables the Power Save Mode with automatic transition from PFM mode to fixed frequency PWM mode. 4 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS62260 TPS62261 TPS62262 TPS62263 |
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