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TPS799XX Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce TPS799XX
Description  200mA, Low Quiescent Current, Ultra-Low Noise, High PSRR Low Dropout Linear Regulator
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS799XX Fiches technique(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS799xx
SBVS056E – JANUARY 2005 – REVISED OCTOBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT
VOUT(2)
TPS799xxyyyz
XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).(3)
YYY is package designator.
Z is package quantity.
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2)
Output voltages from 1.2V to 4.5V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
(3)
For fixed 1.2V operation, tie FB to OUT.
Over operating temperature range (unless otherwise noted)(1)
PARAMETER
TPS799xx
UNIT
VIN range
–0.3 to +7.0
V
VEN range
–0.3 to VIN +0.3
V
VOUT range
–0.3 to VIN +0.3
V
Peak output current
Internally limited
Continuous total power dissipation
See Dissipation Ratings Table
Junction temperature range, TJ
–55 to +150
°C
Storage junction temperature range , TSTG
–55 to +150
°C
ESD rating, HBM
2
kV
ESD rating, CDM
500
V
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
DERATING FACTOR
BOARD
PACKAGE
RθJC
RθJA
ABOVE TA = 25°C
TA < 25°C
TA = 70°C
TA = 85°C
Low-K(1)
DDC
90°C/W
280°C/W
3.6mW/°C
360mW
200mW
145mW
High-K(2)
DDC
90°C/W
200°C/W
5.0mW/°C
500mW
275mW
200mW
Low-K(1)
YZU
27°C/W
255°C/W
3.9mW/°C
390mW
215mW
155mW
High-K(2)
YZU
27°C/W
190°C/W
5.3mW/°C
530mW
295mW
215mW
Low-K(1)
DRV
20°C/W
140°C/W
7.1mW/°C
715mW
395mW
285mW
High-K(2)
DRV
20°C/W
65°C/W
15.4mW/°C
1540mW
845mW
615mW
(1)
The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board.
(2)
The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2


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