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TS942AIN Fiches technique(PDF) 6 Page - STMicroelectronics |
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TS942AIN Fiches technique(HTML) 6 Page - STMicroelectronics |
6 / 19 page Electrical characteristics TS941 TS942 TS944 6/19 Table 5. VCC = +5V, VDD = 0V, RL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Vio Input offset voltage TS941/2/4 TS941/2/4A TS941/2/4B 10 5 2 mV ΔVio Input offset voltage drift 7 µV/°C Iio Input offset current (1) 1. Maximum values include unavoidable inaccuracies of the industrial tests. 1 100 pA Iib Input bias current (1) 1 150 pA CMR Common mode rejection ratio 60 85 dB SVR Supply voltage rejection ratio 50 85 dB Avd Large signal voltage gain VO = 2Vpp, RL = 1MΩ 100 dB VOH High level output voltage VID = 100mV, RL = 1MΩ RL = 10kΩ 4.9 4.8 4.99 4.85 V VOL Low level output voltage VID = -100mV, RL = 1MΩ RL = 10kΩ 1 100 5 150 mV Io Output source current VID = 100mV, VO = VDD Output sink current VID = -100mV, VO = VCC 3 3.7 4.5 5 mA ICC Supply current (per amplifier), AVCL = 1, no load 1.2 1.85 µA GBP Gain bandwidth product, RL = 1MΩ, CL = 50pF 10 kHz SR Slew rate, RL = 1MΩ, CL = 50pF 3 4.5 V/ms φm Phase margin, CL = 50pF 65 Degrees |
Numéro de pièce similaire - TS942AIN |
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Description similaire - TS942AIN |
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