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SL23EP09ZC-1 Fiches technique(PDF) 2 Page - SpectraLinear Inc |
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SL23EP09ZC-1 Fiches technique(HTML) 2 Page - SpectraLinear Inc |
2 / 13 page Rev 1.1, February 2, 2007 Page 2 of 13 SL23EP09 Pin Configuration 16-Pin SOIC and TSSOP Pin Description Pin Number Pin Name Pin Type Pin Description 1 CLKIN Input Reference Frequency Clock Input. Weak pull-down (250k ). 2 CLKA1 Output Buffered Clock Output, Bank A. Weak pull-down (250k ). 3 CLKA2 Output Buffered Clock Output, Bank A. Weak pull-down (250k ). 4 VDD Power 3.3V or 2.5V Power Supply. 5 GND Power Power Ground. 6 CLKB1 Output Buffered Clock Output, Bank B. Weak pull-down (250k ). 7 CLKB2 Output Buffered Clock Output, Bank B. Weak pull-down (250k ). 8 S2 Input Select Input, select pin S2. Weak pull-up (250k ). 9 S1 Input Select Input, select pin S1. Weak pull-up (250k ). 10 CLKB3 Output Buffered Clock Output, Bank B. Weak pull-down (250k ). 11 CLKB4 Output Buffered Clock Output, Bank B. Weak pull-down (250k ). 12 GND Power Power Ground. 13 VDD Power 3.3V or 2.5V Power Supply. 14 CLKA3 Output Buffered Clock Output, Bank A. Weak pull-down (250k ). 15 CLKA4 Output Buffered Clock Output, Bank A. Weak pull-down (250k ). 16 CLKOUT Output Buffered Clock Output, PLL Internal Feedback Output. Weak pull-down (250k ). |
Numéro de pièce similaire - SL23EP09ZC-1 |
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