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TC4052BP Fiches technique(PDF) 4 Page - Toshiba Semiconductor |
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TC4052BP Fiches technique(HTML) 4 Page - Toshiba Semiconductor |
4 / 11 page TC4051,4052,4053BP/BF/BFN/BFT 2007-10-01 4 TC4053B Truth Table Control C Impedance between IN-OUT (Note) H L 0.5 to 5 × 102 Ω >109 Ω Note: See electrical characteristics Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit DC supply voltage VDD-VSS −0.5 to 20 V DC supply voltage VDD-VEE −0.5 to 20 V Control input voltage VCIN VSS − 0.5 to VDD + 0.5 V Switch I/O voltage VI/VO VEE − 0.5 to VDD + 0.5 V Control input current ICIN ±10 mA Potential difference across I/O during ON VI-VO −0.5 to 0.5 V Power dissipation PD 300 (DIP)/180 (SOIC) mW Operating temperature range Topr −40 to 85 °C Storage temperature range Tstg −65 to 150 °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). OUT IN c 14 2 A 5 B INH C 12 13 1 3 Z-COMMON OUT IN c OUT IN c OUT IN c OUT IN c OUT IN c OUT IN c X-COMMON 0Y 0Z 0X 1X 1Y 1Z 4 11 10 9 6 7 VEE 8 VSS 16 VDD Y-COMMON 15 |
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