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TC74VHCT573AF Fiches technique(PDF) 1 Page - Toshiba Semiconductor |
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TC74VHCT573AF Fiches technique(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74VHCT573AF/AFT/AFK 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT573AF,TC74VHCT573AFT,TC74VHCT573AFK Octal D-Type Latch with 3-State Output The TC74VHCT573A is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: Output in off-state Features • High speed: tpd = 7.7 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) • Power down protection is provided on all inputs and outputs. • Balanced propagation delays: tpLH ∼− tpHL • Low noise: VOLP = 1.6 V (max) • Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 573 type. TC74VHCT573AF TC74VHCT573AFT TC74VHCT573AFK Weight SOP20-P-300-1.27A : 0.22 g (typ.) TSSOP20-P-0044-0.65A : 0.08 g (typ.) VSSOP20-P-0030-0.50 : 0.03 g (typ.) |
Numéro de pièce similaire - TC74VHCT573AF_07 |
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Description similaire - TC74VHCT573AF_07 |
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