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TA2170FLG Fiches technique(PDF) 7 Page - Toshiba Semiconductor |
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TA2170FLG Fiches technique(HTML) 7 Page - Toshiba Semiconductor |
7 / 13 page TA2170FLG 2006-04-19 7 3. Adjustment of DC output voltage Perform the following with the OUT ADJ pin (pin 13) using the power supply of VCC1 and VCC2: • If a boost voltage is applied to VCC1, VCC2 is connected to a battery and the difference between VCC1 and VCC2 is greater than or equal to 0.7 V, short pins 13 and 14 together. In this case the DC output voltage will be as follows: 2 VCC2 . • If the difference between VCC1 and VCC2 is less than 0.7 V, or if VCC1 and VCC2 are connected to the same power supply, leave pin 13 open. In these cases, the DC output voltage will be 2 V 0.7 VCC2 − . 4. Switch (1) Timing chart Refer to Figure 2 for the IC timing chart. (2) PW SW The device is ON when this pin is set to High. To prevent the IC being turned ON by external noise, it is necessary to connect an external pull-down resistor to the PW SW pin. The pin is highly sensitive. (3) Mute smoothing Ensure that the smoothing resistor used for the mute pin is 100 k Ω or less. The switch circuit will not operate normally if the value is greater than this. 200 ms 100 ms OFF ON ON OFF ON OFF OUT MUTE ALL MUTE PW SW Figure 2. Timing Chart |
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