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TC74HC40102AP Fiches technique(PDF) 9 Page - Toshiba Semiconductor

No de pièce TC74HC40102AP
Description  Dual BCD Programmable Down Counter
Download  14 Pages
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Fabricant  TOSHIBA [Toshiba Semiconductor]
Site Internet  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC74HC40102AP Fiches technique(HTML) 9 Page - Toshiba Semiconductor

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TC74HC40102,40103AP/AF
2007-10-01
9
Timing Requirements (input: tr = tf = 6 ns)
Test Condition
Ta
= 25°C
Ta
=
40 to
85°C
Characteristics
Symbol
VCC (V)
Typ.
Limit
Limit
Unit
Minimum pulse width
(CK)
tW (H)
tW (L)
2.0
4.5
6.0
75
15
13
95
19
16
ns
Minimum pulse width
( CLR , APE )
tW (L)
2.0
4.5
6.0
75
15
13
95
19
16
ns
Minimum set-up time
( SPE -CK)
ts
2.0
4.5
6.0
75
15
13
95
19
16
ns
Minimum set-up time
( CI/CE -CK)
ts
2.0
4.5
6.0
150
30
26
190
38
32
ns
Minimum set-up time
(Jn-CK)
ts
2.0
4.5
6.0
75
15
13
95
19
16
ns
Minimum set-up time
(Jn- APE )
ts
2.0
4.5
6.0
75
15
13
95
19
16
ns
Minimum hold time
( SPE -CK)
th
2.0
4.5
6.0
0
0
0
0
0
0
ns
Minimum hold time
( CI/CE -CK)
th
2.0
4.5
6.0
0
0
0
0
0
0
ns
Minimum hold time
(Jn-CK)
th
2.0
4.5
6.0
0
0
0
0
0
0
ns
Minimum hold time
(Jn- APE )
th
2.0
4.5
6.0
0
0
0
0
0
0
ns
Minimum removal time
( CLR , APE )
trem
2.0
4.5
6.0
75
15
13
95
19
16
ns
Clock frequency
f
2.0
4.5
6.0
4
20
24
3
16
19
MHz


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