TC74AC74FT datasheet(1/10 Pages) TOSHIBA

No de pièce	TC74AC74FT

Description	CMOS Digital Integrated Circuit Silicon Monolithic Dual D-Type Flip Flop with Preset and Clear

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Fabricant	TOSHIBA [Toshiba Semiconductor]

Site Internet	http://www.semicon.toshiba.co.jp/eng

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TC74AC74P/F/FN/FT

2007-10-01

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC74P,TC74AC74F,TC74AC74FN,TC74AC74FT

Dual D-Type Flip Flop with Preset and Clear

The TC74AC74 is an advanced high speed CMOS D-FLIP

FLOP fabricated with silicon gate and double-layer metal wiring

C2MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

The signal level applied to the D INPUT is transferred to Q

OUTPUT during the positive going transition of the CK pulse.

CLR and PR are independent of the CK and are

accomplished by setting the appropriate input to an “L” level.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

• High speed: fmax = 200 MHz (typ.) at VCC = 5 V

• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

• High noise immunity: VNIH = VNIL = 28% VCC (min)

• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)

Capability of driving 50

Ω

transmission lines.

• Balanced propagation delays: tpLH ∼− tpHL

• Wide operating voltage range: VCC (opr) = 2 V to 5.5 V

• Pin and function compatible with 74F74

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74AC74P

TC74AC74F

TC74AC74FN

TC74AC74FT

Weight

DIP14-P-300-2.54

: 0.96 g (typ.)

SOP14-P-300-1.27A

: 0.18 g (typ.)

SOL14-P-150-1.27

: 0.12 g (typ.)

TSSOP14-P-0044-0.65A

: 0.06 g (typ.)

Numéro de pièce similaire - TC74AC74FT

Fabricant	No de pièce	Fiches technique	Description
Toshiba Semiconductor	TC74AC74FT	290Kb / 7P	DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

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TC74AC74FT Fiches technique(PDF) 1 Page - Toshiba Semiconductor

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