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TC9WMB1AFU Fiches technique(PDF) 8 Page - Toshiba Semiconductor |
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TC9WMB1AFU Fiches technique(HTML) 8 Page - Toshiba Semiconductor |
8 / 18 page TC9WMB1AFK/FU,TC9WMB2AFK/FU 2007-10-19 8 7. Notes on Use (1) Powering up the device This device contains a power-on clear circuit, which initializes the internal circuit of the device when the power is turned on. After initialization, the address counter returns to the first address 00H and the SDA pin goes to the high-impedance state (standby state). If initialization fails, the device may malfunction. When powering up the device, observe the following precautions to assure that the clear circuit will operate normally: (a) Pull SCL and SDA “high”. (b) The power rising time (tR) must be 10 ms or less. (c) After turning off the power, wait at least 100 ms (tOFF) before attempting to power up the device again. (d) The supply voltage must rise from ∼− 0 V. (e) After turning on the power, wait at least 10 ms before attempting to send an instruction to the device. (2) Pulling up the SDA and SCL pins The device requires the SDA and SCL pins to be pulled up with an external resistor. The recommended pull-up resistance range is 1 k Ω to 10 kΩ. (3) Noise elimination time for the SDA and SCL pins The device contains a low-pass filter for eliminating noise on the SDA and SCL pins. Its guaranteed value corresponds to the noise suppression time Ti, given in the AC characteristics table. (4) Write operation (a) The address counter is incremented when a write instruction is received successfully. It is incremented on the falling edge of the SCL pulse where the least significant bit of data is received. Figure 10 tOFF tR 0 V 10 ms VCC VCC ∼− 0 V Increment D1 D0 Figure 11 Increment Timing Diagram |
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