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SN74ALVC162334DL Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74ALVC162334DL Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 13 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION DGG, DGV, OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 OE Y1 Y2 GND Y3 Y4 VCC Y5 Y6 GND Y7 Y8 Y9 Y10 GND Y11 Y12 VCC Y13 Y14 GND Y15 Y16 NC CLK A1 A2 GND A3 A4 VCC A5 A6 GND A7 A8 A9 A10 GND A11 A12 VCC A13 A14 GND A15 A16 LE NC − No internal connection SN74ALVC162334 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES127E – FEBRUARY 1998 – REVISED OCTOBER 2004 • Member of the Texas Instruments Widebus™ Family • Ideal for Use in PC100 Register DIMM • Operates From 1.65 V to 3.6 V • Max tpd of 3.8 ns at 3.3 V • ±12-mA Output Drive at 3.3 V • Output Ports Have Equivalent 26- Ω Series Resistors, So No External Resistors Are Required • Designed to Comply With JEDEC 168-Pin and 200-Pin SDRAM Buffered DIMM Specification • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) This 16-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. The outputs, which are designed to sink up to 12 mA, include equivalent 26- Ω resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74ALVC162334DL SSOP - DL ALVC162334 Tape and reel SN74ALVC162334DLR -40 °C to 85°C TSSOP - DGG Tape and reel SN74ALVC162334DGGR ALVC162334 TVSOP - DGV Tape and reel SN74ALVC162334DGVR VC2334 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1998–2004, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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