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RT8802A Fiches technique(PDF) 4 Page - Richtek Technology Corporation

No de pièce RT8802A
Description  2/3/4/5-Phase PWM Controller for High-Density Power Supply
Download  28 Pages
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Fabricant  RICHTEK [Richtek Technology Corporation]
Site Internet  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8802A Fiches technique(HTML) 4 Page - Richtek Technology Corporation

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RT8802A
4
DS8802A-04 August 2007
www.richtek.com
All brandname or trademark belong to their owner respectively
Function Block Diagram
ISP1 (Pin 25), ISP2 (Pin 24), ISP3 (Pin 23),
ISP4 (Pin 22), ISP5 (Pin 21)
Current sense positive input pins for individual converter
channel current sensing.
PWM1 (Pin 26), PWM2 (Pin 27), PWM3 (Pin 28),
PWM4 (Pin 29), PWM5 (Pin 30)
PWM outputs for each driven channel. Connect these pins
to the PWM input of the MOSFET driver. For systems
which using 2/3/4 channels, pull PWM 3/4/5 pins up to
high.
VDD (Pin 31)
IC power supply. Connect this pin to a 5V supply.
VID7 (Pin 32), VID6 (Pin 33), VID5 (Pin 34), VID4 (Pin
35), VID3 (Pin 36), VID2 (Pin 37), VID1 (Pin 38),
VID0 (Pin 39), VID_SEL (40)
DAC voltage identification inputs for VRD10.x / VRD11 /
K8 / K8_M2 . These pins are internally pulled up to VTT.
GND [Exposed pad (41)]
The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
VIDSEL
VID [7]
Table
VTT
X
VR11
GND
X
VR10.x
VDD
NC
K8
VDD
GND
K8_M2
Oscillator
&
Ramp
Generator
Sample
& Hold
PWM1
PWM2
PWM3
Droop Tune
& Hi-I
Detection
Current
Processing
SUM/N
& OCP
Detection
DAC
VID4
VID2
VID1
VID0
VID5
VID3
VR_FAN
FBRTN
VR_Ready
TSEN
GND
Soft Start
& PGOOD
ISN35
ISP1
ISP2
ISP3
Pulse
Width
Modulator
& Output
Buffer
PWM4
Mux
ISP4
Mux
Temperature
Processing
Power On
Reset
SS
FB
EA
CSA
COMP
ADJ
VID_SEL
Clamp
ISP5
PWM5
IMAX
VID6
VID7
OFS
VR_HOT
RT
DVD
VTT/EN
VDD
IOUT
Mux
ISN1
ISN24
+
-
TCOC


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